Hello,



Read again about more of my philosophy about ThreadSanitizer and about
Go programming language and more of my thoughts..

I am a white arab, and i think i am smart since i have invented many
scalable algorithms, and today i will talk about Sanitizers..


I think i am really smart, and here is the second weakness of Go
programming language, so Go programming language is using
ThreadSanitizer algorithm in its race detector so that to detect race conditions, but here is the weakness of ThreadSanitizer:

So read carefully the following paper about ThreadSanitizer:

https://static.googleusercontent.com/media/research.google.com/en//pubs/archive/35604.pdf

And it says in the conclusion the following:

"ThreadSanitizer uses a new algorithm; it has several modes of
operation, ranging from the most conservative mode (which has few false positives but also misses real races) to a very aggressive one (which
has more false positives but detects the largest number of
real races)."

So as you are noticing since the very agressive mode of Threadsanitizer
doesn't detect "all" the data races, so then it is a problem, so then CSP(Communicating sequential processes) model can not help Go, since
read my below thoughts so that to understand, so then it is not
"scalable", so it is not good, since you can still take a lot of time to
verify a big project so that to find the remaining data races that are
not detected by ThreadSanitizer.

More of my philosophy about the Go programming language and its big
defect and more of my thoughts..

I think i am really smart, and i will make you understand the big defect
of Go programming language, and it is that so that to avoid effectively
race conditions with the CSP(Communicating sequential processes) model,
you have to have different memory address spaces for different processes
that are distributed accross different machines or local to a machine,
so if you use threads or lightweight thread like is using Go programming language, so then CSP(Communicating sequential processes) model will not
work, since in the same memory adress space, you can still have race conditions. So notice carefully how superpascal is doing it by using
parallel "processes" with different memory address spaces by reading the following:

https://en.wikipedia.org/wiki/SuperPascal

Message passing of MPI for distributed programming is doing the same.

More of my philosophy about Superpascal and about CSP(Communicating
sequential processes) and more..

I think i am smart, and i am also programming in Object Pascal
of Delphi and Freepascal, and i think i am also a smart "Wirthian"
programmer of the Wirthian familly of ALGOL-like languages, since i have programmed in Pascal and i have also programmed in Superpascal(You can
read about it here: https://en.wikipedia.org/wiki/SuperPascal), and
i have programmed in Object Pascal of Delphi and Freepascal, and i know
more about Superpascal, that was an interesting enhancement of the
pascal language, that brought an enhancement in a form of a "Forall"
statement that is like a Parallel For loop, and that brought an
enhancement in a form of "Channels" that look like Go channels and that
permit to code parallel programs, so the Superpascal channels allowed us
to program like in CSP(Communicating sequential processes) that is a
formal language for describing patterns of interaction in concurrent
systems. And CSP(Communicating sequential processes) is a member of the
family of mathematical theories of concurrency known as process
algebras, or process calculi, based on message passing via channels, so Superpascal Channels allowed us to avoid parallel bugs such as race
conditions, but i think that those channels can also be used in a more
simple way like in the following article, so that they permit to avoid
race conditions and that's also i think a much better enhancement, so
read the following article so that to know about the more simple way of
using Go channels or Superpascal channels so that to avoid race conditions:

https://fodor.org/blog/go-avoiding-race-conditions/

And so that you get an idea about Superpascal, you can look
at its source code in Freepascal here in Gitub:

https://github.com/octonion/superpascal

So as you notice that Superpascal programming language, that was
invented in year 1993, has preceded Go programming language by providing Channels etc. that permit to do parallel programming by avoiding race conditions and such parallel programming bugs.

But you have to know that i am smart and i have also enhanced
Object Pascal of Freepascal and Delphi by inventing the following
Threadpool that scales well and that supports parallel for loop,
you can read about it carefully here in my websites:

https://sites.google.com/site/scalable68/an-efficient-threadpool-engine-with-priorities-that-scales-very-well

And i have also enhanced Object Pascal of Freepascal and Delphi by
inventing a Scalable reference counting with efficient support for weak references, you can take a look carefully about it here in my websites:

https://sites.google.com/site/scalable68/scalable-reference-counting-with-efficient-support-for-weak-references

So as you notice that i am also an inventor of many scalable algorithms
and algorithms..

More of my philosophy about stack memory allocations and about
preemptive and non-preemptive timesharing..

I think i am smart, and as you are noticing in my below thoughts that
i am abstracting smartly so that to make you understand preemptive and non-preemptive timesharing , other than that i will also give you
an interesting Stack memory allocation algorithm in Delphi and
Freepascal so that to use it smartly with my below sophisticated
Stackful coroutines Library, so i will extend my sophisticated Stackful coroutines Library so that to support it smartly, and here it is:

--

var pool: array [1..limit] of integer;
memory: array [min..max] of integer;
top: integer;


procedure initialize;

var index: integer;

begin
for index := 1 to limit do
pool[index] := empty;
top := min − 1
end;

procedure allocate( index, length: integer; var address: integer);

begin

address := pool[index];
if address <> empty then
pool[index] := memory[address]
else
begin
address := top + 1;
top := top + length;
if not (top <= max)
then raise Exception.Create('Stack overflow..')

end
end;

procedure release( index, address: integer);
begin
memory[address] := pool[index];
pool[index] := address
end;

--


More of my philosophy about about the paper and about preemptive and non-preemptive timesharing and more..

I have just forgotten to post about who has written the following
paper about cooperative and preemptive tasking:

https://users.ece.cmu.edu/~koopman/pubs/koopman90_HeavyweightTasking.pdf

Here is the Professor Phil Koopman of Carnegie Mellon University from Department of Electrical and Computer Engineering who has written
this paper:

https://users.ece.cmu.edu/~koopman/personal.html

And note that i am calling, in my thoughts below, cooperative and
preemptive tasking: "preemptive and non-preemptive timesharing"

More of my philosophy about Intel 8051 controller and about preemptive
and non-preemptive timesharing and more..

I have just quickly read the following interesting paper and it says
that judicious use of cooperative tasking techniques can also often meet
an embedded system's multitasking requirements, while giving better
performance and a simpler software environment than a preemptive
multitasker, so read it carefully here:

https://users.ece.cmu.edu/~koopman/pubs/koopman90_HeavyweightTasking.pdf

And notice that it also says in the above paper that so that to meet
the requirements with cooperative multitasking you have to move the time-critical code to interrupt-service routines. And let us look
for example at the Intel 8051 controller here:

https://www.electronicwings.com/8051/introduction-to-8051-controller

So as you notice that it has many hardware interrupts that you can
use so that to make the cooperative tasking efficient, and i think it
also comes with two clock timers interrupts that you can use to
implement preemptive multitasking if you want, and you have also to know
about interrupt latency when programming embedded systems with hardware controllers, and you have to know that the hardware interrupts have to
get serviced fast enough and often enough, so you shouldn't disable
interrupts for too long a period of time, and just to give you an idea
, look for example at the nonbuffered communication UART (Universal Asynchronous Receiver Transmitter) operating at 38,400 bits per second
will interrupt every 208 microseconds. This is 1/38,400*8 because they
will interrupt for every byte (8 bits), and a processor or controller
running at 25MHz executes most of its instructions in
2 or 3 system-clock periods. That would be an average of 120 nanoseconds (1/25,000,000*3). In theory, this means you could execute as
many as 1,730 instructions in the interrupt interval. So that was only
in theory, now you have to do the reality check. You must take into consideration that there are more interrupts than just that
communication channel. The timer interrupt will be firing off every so
often. And the communication interrupt itself will have interrupts
disabled for good period of time, and not only that, but there is also
the tasks switch that can be expensive, so you have to think about
it efficiently.

So i invite you to read my below thoughts about preemptive and
non-preemptive timesharing and more so that to understand much more efficiently:

More of my philosophy about preemptive and non-preemptive timesharing
and more..

I have just took a smart look at Modula-2 language(Modula-2 is a
structured, procedural programming language developed between 1977 and
1985 by Niklaus Wirth at ETH Zurich, and he has also developed Pascal
language, read about Niklaus Wirth here: https://en.wikipedia.org/wiki/Niklaus_Wirth), and i think Modula-2
language was among the first languages that has provided preemptive and non-preemptive timesharing with coroutines, but the preemptive
timesharing in Modula-2 uses Interrupt handling using IOTRANSFER, but it
is best reserved for programs that will run without operating system
support. Installing an interrupt handler on a multiuser system is not feasi­ble because doing so would affect other users. (For this reason, IOTRANSFER is not a mandatory feature of Modula-2.) Even on single-user systems, IOTRANSFER can be difficult to use because installing an
interrupt handler causes the old interrupt handler (which most likely
belongs to the operating system) to be lost. So this is why i think that
the best way in modern operating systems is to use non-preemptive
timesharing with coroutines, so this is why i am providing you with my sophisticated implementation of stackful coroutines, read about it in my thoughts below:

More of my philosophy about timesharing that is a Solution to Computer Bottlenecks..

I invite you to look at the following very interesting video about
timesharing that is a Solution to Computer Bottlenecks:

https://www.youtube.com/watch?v=Q07PhW5sCEk

I think i am smart, and you have to understand one important thing
and it is: What is the difference between a software architect and
a software engineer?, i think there is an important difference and it
is also like abstracted in the following question:

"How it is made?"

So i think that software engineering works at a higher level than
a software architect, this is why you will notice that i am
quickly implementing a sophisticated stackful coroutines
Library and i am quickly implementing setjmp() and longjmp() with
x64 assembler or code machine, read my below thoughts about them, but
you have to know that my sophisticated stackful coroutines Library
does a kind of timesharing as in the above video, but i think that there
is two kinds of timesharing: the preemptive one, and the non-preemptive
one, but the difference is that the preemptive one does interrupt with a
timer the coroutines from an external scheduler in
a form of function, but notice below that i am implementing the
non-preemptive timesharing in my sophisticated coroutines Library, but
you have to be smart and notice that my way of doing is like the
software architect way, since i am implementing it from the lowest level
with x64 assembler routines that are part of the non-preemptive
scheduler, but not only that, but you have also to look at how i am also implementing a
sophisticated and much more rich interface in my stackful coroutines
Library, so it is like both software achitecting and software
engineering, so here is all my below thoughts that shows how i am
implementing it quickly, so read it carefully since you have also to
know what's the problem with the stack frames when architecturing and
using the setjmp() and longjmp() so that to implement coroutines:

More of my philosophy and precision about the link of the article and more..

And notice that the link below of the article that shows the problem
of implementing coroutines with just setjmp() and longjmp()
is from the last semester of the second year of the course
called "CS4411 Operating Systems" from Michigan Technological
University, but i think i am smart and those courses are easy
for me, so i invite you to read about this course that requires
both the course of "CS3331 Concurrent Computing" and "CS3421 Computer Organization", and here it is:

http://www.csl.mtu.edu/cs4411.ck/www/Home.html

More of my philosophy about coroutines and about setjmp() and longjmp()..

I think i am smart, and i will say that with setjmp() and longjmp()
you can implement a generator or the like, but you can not implement
coroutines with just setjmp() and longjmp(), and so that to understand
it, i invite you to read the following article that shows how when you
yield from a first function with a longjmp() to the main body of a
program and when you call another functions with longjmp(), it can make
the stack frames not work correctly, and when you understand it you will
not use setjmp() and longjmp() alone so that to implement coroutines, so
read the following article so that to understand the problem with
the stack frames, and i am understanding it easily:

https://www.csl.mtu.edu/cs4411.ck/www/NOTES/non-local-goto/coroutine.html

So this is why i have also implemented my sophisticated stackful
coroutines library so that to solve this problem, and here is my
sophisticated coroutines library and read about it and download it from
here:

https://sites.google.com/site/scalable68/object-oriented-stackful-coroutines-library-for-delphi-and-freepascal

More of my philosophy about setjmp() and longjmp() and generators and coroutines..

I have just quickly implemented setjmp() and longjmp() in x64 assembler,
and after that i have just implemented quickly a good example of a
generator with my setjmp() and longjmp(), look at it below, and in
computer science, a generator is a routine that can be used to control
the iteration behaviour of a loop. All generators are also iterators. A generator is very similar to a function that returns an array, in that a generator has parameters, can be called, and generates a sequence of
values. However, instead of building an array containing all the values
and returning them all at once, a generator yields the values one at a
time, which requires less memory and allows the caller to get started processing the first few values immediately. In short, a generator looks
like a function but behaves like an iterator. So here is my
implementations in freepascal and delphi and they are working perfectly:

Here is my first unit that implements longjmp() and setjmp() and notice
how i am saving the non-volatile registers and how i am coding it in
x64 assembler:

======


{ Volatile registers: The calling program assumes registers
RAX, RCX, RDX, and R8 through R11 are volatile.
The contents of registers RBX, RSI, RDI, RBP, RSP, and
R12 through R15 are considered non-volatile. Functions return
values in RAX. }



unit JmpLib64;

{$IFDEF FPC}
{$ASMMODE intel}
{$ENDIF}
interface

type
jmp_buf = record
RBX,
RSI,
RDI,
RSP,
RBP,
RIP,
R12,
R13,
R14,
R15: UInt64;
end;

{ setjmp captures the complete task state which can later be used to
perform a non-local goto using longjmp. setjmp returns 0 when it is
initially called, and a non-zero value when it is returning from a call
to longjmp. setjmp must be called before longjmp. }

function setjmp(out jmpb: jmp_buf): UInt64;

{ longjmp restores the task state captured by setjmp (and passed in
jmpb). It then returns in such a way that setjmp appears to have
returned with the value retval. setjmp must be called before longjmp. }

procedure longjmp(const jmpb: jmp_buf; retval: UInt64);
implementation

function setjmp(out jmpb: jmp_buf): UInt64; assembler;{$IFDEF FPC} nostackframe; {$ENDIF}register;
asm
{ -> RCX jmpb }
{ <- RAX Result }
MOV RDX, [RSP] // Fetch return address (RIP)
// Save task state
MOV [RCX+jmp_buf.&RBX], RBX
MOV [RCX+jmp_buf.&RSI], RSI
MOV [RCX+jmp_buf.&RDI], RDI
MOV [RCX+jmp_buf.&RSP], RSP
MOV [RCX+jmp_buf.&RBP], RBP
MOV [RCX+jmp_buf.&RIP], RDX
MOV [RCX+jmp_buf.&R12], R12
MOV [RCX+jmp_buf.&R13], R13
MOV [RCX+jmp_buf.&R14], R14
MOV [RCX+jmp_buf.&R15], R15


SUB RAX, RAX
@@1:
end;

procedure longjmp(const jmpb: jmp_buf; retval: UInt64);assembler;{$IFDEF
FPC} nostackframe; {$ENDIF}register;
asm
{ -> RCX jmpb }
{ RDX retval }
{ <- RAX Result }
XCHG RDX, RCX
MOV RAX,RCX
MOV RCX, [RDX+jmp_buf.&RIP]
// Restore task state
MOV RBX, [RDX+jmp_buf.&RBX]
MOV RSI, [RDX+jmp_buf.&RSI]
MOV RDI, [RDX+jmp_buf.&RDI]
MOV RSP, [RDX+jmp_buf.&RSP]
MOV RBP, [RDX+jmp_buf.&RBP]
MOV R12, [RDX+jmp_buf.&R12]
MOV R13, [RDX+jmp_buf.&R13]
MOV R14, [RDX+jmp_buf.&R14]
MOV R15, [RDX+jmp_buf.&R15]
MOV [RSP], RCX // Restore return address (RIP)

TEST RAX, RAX // Ensure retval is <> 0
JNZ @@1
MOV RAX, 1
@@1:
end;

end.

================

And here is my example of a generator with my longjmp() and setjmp():


{ In computer science, a generator is a routine that can be used to
control the iteration behaviour of a loop. All generators are also
iterators. A generator is very similar to a function that returns an
array, in that a generator has parameters, can be called, and generates
a sequence of values. However, instead of building an array containing
all the values and returning them all at once, a generator yields the
values one at a time, which requires less memory and allows the caller
to get started processing the first few values immediately. In short, a generator looks like a function but behaves like an iterator. }

program test_generator;

{$APPTYPE CONSOLE}

uses
JmpLib64;

type PtrInt = ^Integer;

var
childtask,maintask: jmp_buf;
myarr1: array of integer;
i,a:integer;
Ptr1:PtrInt;

function generator(var myarr:array of integer):integer;

var i1:integer;
val:integer;
ptr:PtrInt;
begin


i1:=0;

val:= setjmp(childtask);

i1:=val-1;

if val=0 then
begin
new(ptr);
ptr^:=myarr1[i1];
longjmp(maintask,uint64(ptr));
end;

if val=10
then
begin
writeln('Exiting child..');
exit;
end;

inc(i1);
new(ptr);
ptr^:=myarr1[i1];
longjmp(maintask,uint64(ptr));
end;

begin

setlength(myarr1,10);

for i:=0 to 9
do myarr1[i]:=i;

uint64(ptr1):=setjmp(maintask);

if ptr1=nil then generator(myarr1);

a:=ptr1^;
dispose(ptr1);

if (a<=length(myarr1))
then
begin
if a=length(myarr1)
then longjmp(childtask,a+1)
else
begin
writeln('Value returned by generator is: ',a);
longjmp(childtask,a+1);
end;
end;

setlength(myarr1,0);

end.

=====



More of my philosophy about Intel's Alder Lake and more of my thoughts..


I think that the new Intel's Alder Lake is a winner, and i think that
the performance/efficiency core design of Intel's Alder Lake could find
its way into servers, workstations, or embedded IT systems as you can
notice it by reading the following article:

https://www.networkworld.com/article/3631072/will-intels-new-desktop-cpu-design-come-to-its-xeon-server-chips.html

More of my philosophy about the ARM and x86 memory models and more
of my thoughts..

I think i am smart, and as you have just noticed i have just said
that x86 is the future(read my below thoughts so that to understand why)
, but i think that ARM architecture has another big defect, since its
weak hardware memory model has not balanced correctly between safety or security and performance, so i think that it is a big defect in ARM,
read carefully the following article about x86 TSO memory model:

https://research.swtch.com/hwmm

So notice that Intel says that it has well balanced between safety or
security and performance by saying the following:

"To address these problems, Owens et al. proposed the x86-TSO model,
based on the earlier SPARCv8 TSO model. At the time they claimed that
“To the best of our knowledge, x86-TSO is sound, is strong enough to
program above, and is broadly in line with the vendors’ intentions.” A
few months later Intel and AMD released new manuals broadly adopting
this model."

And read more here so that to understand that x86 TSO memory model is
very good:

https://jakob.engbloms.se/archives/1435


So i think that ARM has a big defect since it has to provide
with TSO memory model as RISC-V is providing it, since it is
very important for the security or safety concerns

More of my philosophy about the fight between x86 and ARM architectures
and more of my thoughts..

I invite you to read the following interesting article about the
fight between x86 or x64 and ARM architectures

ARM Servers on AWS: How to Save up to 30%

Read more here:

https://opsworks.co/arm-servers-on-aws-how-to-save-up-to-30/

So notice that it says the following about ARM CPU architecture compared
to x86 CPU architecture:

"Running in a standard setting, Graviton2 performs 20% better, and the
power consumption of the Arm core is about half that of other types of
cores. Since the cost savings are also about 20%, performance-cost
improvements reach 40%."

But i think that the new Intel's Alder Lake is a new winner, since
read the following article so that to notice:

Intel's Alder Lake chip could speed PCs by 30% while saving battery power

https://www.cnet.com/tech/computing/intels-alder-lake-chip-could-speed-pcs-by-30-while-saving-battery-power/

Also here is the other way that is using Intel so that to fight ARM:

Intel CEO says co-designed x86 chips will fend off Arm threat

Read more here:

https://www.pcgamer.com/intel-x86-vs-arm-gelsinger/

So i think that x86 architecture is the future.

And you can read my following thoughts about 3D stacking in CPUs and
about EUV (extreme ultra violet) and about scalability and more in the following web link:

https://groups.google.com/g/alt.culture.morocco/c/USMMhMB9WIE

More of my philosophy about open market and more of my thoughts..

I have just yesterday said that China is not correctly an open market
(read my thoughts below about it), and here is more logical proof about
it, so read the following article so that to understand it:

China is not heading toward a market economy, often due to its own
policies, report concludes

Read more here:

https://www.scmp.com/news/china/article/3151192/china-not-heading-toward-market-economy-often-due-its-own-policies

More about white supremacism and about nationalism and about competition
and more of my thoughts..

I think i am smart and i think that white supremacism is
archaism, and i think that even nationalism is archaism, since
the very basis of economy is that we have also to be healthy
"competition" so that to to higher productivity and so that to higher
quality, and notice that lowering the cost of a product or service
can become a quality for a part of the people, so it is
why i think that nationalism and white supremacism are archaism,
since economy is also by logical analogy like being science and being technology, since i think being science or being technology is both
universal and private, since we have also to know how to encourage by
buying useful creativity and inventions of technology and science even
from another country or another ethnical group so that to advance
correctly science and technology, so then i say that economic
nationalism lacks this kind of "flexibility" that permits to advance
correctly, and it is why i think that China lacks this kind of
flexibility since its market is not a correctly open market.

More of my philosophy about large AI models and about artificial
intelligence and more of my thoughts..

And read the following article about AI:

ARK Invest: AI training costs dropped 100-fold between 2017 and 2019

https://venturebeat.com/2020/06/04/ark-invest-ai-training-costs-dropped-100-fold-between-2017-and-2019/

Also read the following article about AI:

Microsoft and Nvidia team up to train one of the world’s largest
language models

https://venturebeat.com/2021/10/11/microsoft-and-nvidia-team-up-to-train-one-of-the-worlds-largest-language-models/

And read the following article about AI:

GPT-3 Scared You? Meet Wu Dao 2.0: A Monster of 1.75 Trillion Parameters
Wu Dao 2.0 is 10x larger than GPT-3. Imagine what it can do.

https://towardsdatascience.com/gpt-3-scared-you-meet-wu-dao-2-0-a-monster-of-1-75-trillion-parameters-832cd83db484

And notice that it says the following:

"Leading researcher Tang Jie highlighted Wu Dao 2.0’s skills in “poetry creation, couplets, text summaries, human setting questions and answers, painting” and even acknowledge that the system “ha[s] been close to breaking through the Turing test, and competing with humans.”"

So i think that we have to be optimistic about those large AI models
like Wu Dao 2.0, since Wu Dao 2.0 has been close to breaking through the
Turing test and competing with humans, so i think that those large AI
models will soon attain human common sense and will soon break through
the Turing test.

And you can read my thoughts about artificial intelligence and
productivity and about China and its artificial intelligence and
computer chips in the following web link so that to understand more:

https://groups.google.com/g/alt.culture.morocco/c/UOt_4qTgN8M

And you can read my thoughts about the next industrial revolution and
about Exascale supercomputers and more in the following web link:

https://groups.google.com/g/alt.culture.morocco/c/hT6faP8cndE

And Moores law would predict a doubling every two years, however
Nvidia's GPU performance was more than tripled every two years
fulfilling Huang's law. Huang's law claims that a synergy between
hardware, software and artificial intelligence makes the new 'law' possible.

Read more here about Huang's law:

https://en.wikipedia.org/wiki/Huang%27s_law#:~:text=Moores%20law%20would%20predict%20a,the%20new%20'law'%20possible.

And here is BEZOS’ LAW:

"The Cost of Cloud Computing will be cut in half every 18 months"

You can read more about it here:

http://blog.2600hz.com/bezos-law

More of my philosophy about white supremacism and about the republicans
in USA and more of my thoughts..

I am a white arab from Morocco, and i think i am smart since i have also invented many scalable algorithms and algorithms..


I invite you to read the following white supremacist and neo-nazis
article from a a white supremacist website called national vanguard:

Losers, Incorporated

https://nationalvanguard.org/2022/03/losers-incorporated/

So i am not in accordance with the above article, since white
supremacism and neo-nazism are ideals but are not good ideals, since
they are too much archaic ideals that bring too much violence, since
i think that the right thing to do is for example what is doing the
republicans that believe in one “Americanism,” and that believe in
a kind of assimilation that makes the identity that matters the being “American.”, but of course you have to understand about my following
model that shows that we have to be this kind of americanism inside
a well balanced model between competition and cooperation or
collaboration as i am explaining in my following thoughts so that to
make the distinction between my model and the philosopher and economist
Adam Smith model:

Also here is my new architectural idea of my philosophy:

An idea can be incomplete, and free incomplete ideas on internet are not
a closed systems, since we are interacting with them, so you can
complete an incomplete free idea on internet with another incomplete
free idea on internet to make the interesting or the good creativity,
and this process also humanize more the society by bringing much more compassion towards humans, since the interesting or good creativity also
comes from free ideas on internet and i say that it is the weakness of
the economist Adam Smith philosophy, since in economic Liberalism of
Adam Smith, self-interest is most of the time regulated by competition
to not lead to corruption, fraud, price-gouging, and cheating, and self-interest and competition is the engine of the properity and
happiness of nations, and Adam Smith described the opposing, but
complementary forces of self-interest and competition as the invisible
hand, it means that while producers and consumers are not acting with
the intent of serving the needs of others or society, they do, since
when you work, your goal is to earn money, but in the process you
provide a valuable good or service that benefits others and society, so
it is the basis of the following saying of Adam Smith: "Human egoism is
the engine of the properity and happiness of nations", but Adam Smith
has not seen the how to become the much more "optimal" properity and
happiness of nations using for example the free incomplete ideas on
internet that makes the good creativity that also come from
"solidarity"(and it is not egoism) of the free incomplete ideas on
internet like i am explaining above with my architectural idea of my philosophy, since you are understanding that in my economic model i am
showing that you have to be like a well balance between competition and cooperation or collaboration(with even solidarity like i am saying
above) so that to be the "optimal" properity and happiness of nations.
So here is my example of my "creativity" of how i have completed
efficiently some free software ideas on internet with my ideas , so it
is my following opensource software project called StringTree, it was
one of my first opensource software projects, so read about it carefully
and download it so that you notice how i have done it smartly:

https://sites.google.com/site/scalable68/stringtree

More of my philosophy about Joseph Stiglitz on People, Power, and Profit
and about artificial intelligence and more of my thoughts..

I have just looked at many videos on youtube of Joseph Stiglitz and
i have just understood him well, but i have just quickly found the
following interesting video of him that explains well the reforms that
we need so that to be progressive capitalism, and he is saying in this
video that he has advised the democratic party about his reforms of his progressive capitalism and i think that he is a democrat, so i
invite you to look at his following interesting video so that
to understand:


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