• Graphics card fans

    From Commander Kinsey@21:1/5 to All on Tue Jul 14 16:10:17 2020
    XPost: sci.electronics.design

    Why do graphics cards only monitor the speed of one fan? If the other one fails, it won't know!

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  • From Gerhard Hoffmann@21:1/5 to All on Wed Jul 15 02:22:24 2020
    XPost: sci.electronics.design

    Am 14.07.20 um 20:54 schrieb Phil Hobbs:
    On 2020-07-14 12:14, Gerhard Hoffmann wrote:
    Am 14.07.20 um 17:50 schrieb bitrex:

    I suggested to Mike E that LT Spice should use a graphic card for
    computation, but I guess that's not going to happen now.

    A modest Windows PC can spin Solidworks 3D images around just fine.

    Is SPICE trivially parallelize-able in that way?

    No. Inverting the conductivity matrix is hard because you
    cannot do the pivoting in advance. The necessity shows
    up during work.

    For transient analysis, every time step builds on the previous one(s)
    and you cannot parallelize a lot of them because you don't know
    the starting condition of the future ones.

    It has been tried often, a working solution would have been worth gold.
    I remember the Weitek array coprocessor back in 80386 times and
    a try with the NS16032. They never got a factor of more than 2 or 3.

    Everything really interesting is np-complete.  :-(

    Cheers, Gerhard

    It probably could be, if you changed the scheme so as to impose a speed-of-light propagation limit.  That way you could divide the
    schematic up into chunks, do time steps locally, and then propagate the changes to adjacent chunks.

    This was my proposal at Z80 / AM9511/AM9512 times, just one node
    per square mm of DUT chip. I also tried to port Spice 2G6
    to Interactive Unix on my 80286/287 Bullet board. What a fiasco.
    64K segments conspiring with f2c as a Fortran compiler. Never could
    have worked.

    But this computer had 2 MB and a 70 MB Fujitsu disk. That was pure
    hubris in the hands of a EE & CS student. Our VAX11 at the semiconductor institute had 2 300 MB Fujitsu Eagles for all people together. :-)
    And we made real chip designs on it.

    Later I had a T800 transputer cluster, that would have mapped nicely
    to this problem. But I never could find a customer for any T800
    solution I proposed. All went X86.

    The only exception was smuggling a Parsytec cluster to east Berlin.
    But little Gerhard did not dare to. Few did I know. Some weeks
    later, all the sudden, was the German re-unification and nobody would
    have cared anymore about smuggling technology to an east-German
    railway company that went belly-up anyway. Sigh.

    That gets rid of every node having to know about every other node on
    every time step, and makes FDTD codes such as my POEMS facility
    parallelize well.  (It works that way.)

    Linear algebra also can be made to vectorize well on the right hardware.



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