But I suspect that component tolerances and mismatched FETs will ruin it.

Otherwise it should be easy to get 60dB down on unwanted harmonics with a better filter.

FWIW I likely won't be here for the next week.

Version 4
SHEET 1 2196 916
WIRE -160 -496 -256 -496
WIRE -16 -496 -160 -496
WIRE 48 -496 -16 -496
WIRE 512 -496 112 -496
WIRE -160 -480 -160 -496
WIRE -256 -464 -256 -496
WIRE -16 -416 -16 -496
WIRE -256 -368 -256 -400
WIRE -160 -368 -160 -400
WIRE -160 -368 -256 -368
WIRE -48 -368 -160 -368
WIRE 144 -368 48 -368
WIRE -256 -320 -256 -368
WIRE -256 -320 -304 -320
WIRE -160 -256 -256 -256
WIRE -16 -256 -160 -256
WIRE 48 -256 -16 -256
WIRE 512 -256 512 -496
WIRE 512 -256 112 -256
WIRE -160 -240 -160 -256
WIRE -256 -224 -256 -256
WIRE -16 -176 -16 -256
WIRE -304 -128 -304 -320
WIRE -256 -128 -256 -160
WIRE -256 -128 -304 -128
WIRE -160 -128 -160 -160
WIRE -160 -128 -256 -128
WIRE -80 -128 -160 -128
WIRE -48 -128 -80 -128
WIRE 80 -128 48 -128
WIRE 144 -128 144 -368
WIRE 144 -128 80 -128
WIRE 160 -128 144 -128
WIRE 272 -128 240 -128
WIRE 320 -128 272 -128
WIRE 448 -128 400 -128
WIRE -304 -80 -304 -128
WIRE 512 -80 512 -256
WIRE -80 -64 -80 -128
WIRE -32 -64 -80 -64
WIRE 80 -64 80 -128
WIRE 80 -64 48 -64
WIRE 832 -64 720 -64
WIRE 1056 -64 832 -64
WIRE 272 -16 272 -128
WIRE 320 -16 272 -16
WIRE 448 -16 448 -128
WIRE 448 -16 400 -16
WIRE 832 -16 832 -64
WIRE 272 16 272 -16
WIRE 272 16 48 16
WIRE 720 16 720 -64
WIRE -304 32 -304 0
WIRE 128 96 128 80
WIRE -272 112 -352 112
WIRE -208 112 -272 112
WIRE 48 112 48 16
WIRE 96 112 48 112
WIRE 912 112 912 96
WIRE 432 128 160 128
WIRE 448 128 448 -16
WIRE 448 128 432 128
WIRE 512 128 512 0
WIRE 512 128 448 128
WIRE 576 128 512 128
WIRE 704 128 656 128
WIRE 720 128 720 80
WIRE 720 128 704 128
WIRE 752 128 720 128
WIRE 832 128 832 64
WIRE 832 128 816 128
WIRE 880 128 832 128
WIRE 96 144 -80 144
WIRE 1056 144 1056 -64
WIRE 1056 144 944 144
WIRE 1168 144 1056 144
WIRE 1264 144 1168 144
WIRE -352 160 -352 112
WIRE 880 160 848 160
WIRE -208 176 -208 112
WIRE 128 176 128 160
WIRE 912 192 912 176
WIRE 704 208 704 128
WIRE -80 224 -80 144
WIRE 16 224 -80 224
WIRE 224 224 16 224
WIRE 304 224 288 224
WIRE 432 224 432 128
WIRE 432 224 384 224
WIRE -80 240 -80 224
WIRE 16 240 16 224
WIRE 848 256 848 160
WIRE -352 336 -352 240
WIRE -352 336 -432 336
WIRE -80 336 -80 320
WIRE -32 336 -80 336
WIRE 16 336 16 304
WIRE 16 336 -32 336
WIRE -432 352 -432 336
WIRE -352 352 -352 336
WIRE -208 352 -208 240
WIRE -208 352 -352 352
WIRE 704 352 704 288
WIRE -32 368 -32 336
WIRE -352 432 -352 352
WIRE -208 448 -208 352
WIRE -352 608 -352 512
WIRE -272 608 -352 608
WIRE -208 608 -208 512
WIRE -208 608 -272 608
FLAG -432 352 0
FLAG 1168 144 output
FLAG -304 32 0
FLAG 848 256 0
FLAG 704 352 0
FLAG 912 96 V+
FLAG 912 192 V-
FLAG 128 80 V+
FLAG 128 176 V-
FLAG -272 112 V+
FLAG -272 608 V-
FLAG -32 368 0
SYMBOL voltage -352 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 10 135 Left 2
WINDOW 0 12 7 Left 2
WINDOW 3 15 104 Left 2
SYMATTR SpiceLine Rser=0.1
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 400 208 R90
WINDOW 0 -7 54 VBottom 2
WINDOW 3 37 50 VTop 2
SYMATTR InstName R1
SYMATTR Value 10.5k
SYMBOL cap 288 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 15n
SYMBOL cap 32 304 R180
WINDOW 0 -33 54 Left 2
WINDOW 3 -49 18 Left 2
SYMATTR InstName C2
SYMATTR Value 15n
SYMBOL polcap -224 176 R0
SYMATTR InstName C4
SYMATTR Value 100µ
SYMBOL OpAmps\\LT1057 128 64 R0
SYMATTR InstName U2
SYMBOL res -176 -256 R0
SYMATTR InstName R6
SYMATTR Value 47k
SYMBOL res 256 -144 R90
WINDOW 0 -1 46 VBottom 2
WINDOW 3 35 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 6.34k
SYMBOL res 416 -144 R90
WINDOW 0 -4 61 VBottom 2
WINDOW 3 39 55 VTop 2
SYMATTR InstName R8
SYMATTR Value 13k
SYMBOL schottky 48 -240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL njf 48 -176 R90
WINDOW 0 -37 23 VRight 2
WINDOW 3 -9 -3 VRight 2
SYMATTR InstName J1
SYMATTR Value J112
SYMBOL voltage -352 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 10 135 Left 2
WINDOW 0 10 0 Left 2
WINDOW 3 15 104 Left 2
SYMATTR SpiceLine Rser=0.1
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL polcap -224 448 R0
SYMATTR InstName C5
SYMATTR Value 100µ
SYMBOL res -96 224 R0
SYMATTR InstName R2
SYMATTR Value 10.5k
SYMBOL cap -240 -160 R180
WINDOW 0 -27 59 Left 2
WINDOW 3 -33 2 Left 2
SYMATTR InstName C3
SYMATTR Value 10µ
SYMATTR Description Polarized Capacitor
SYMATTR Type polcap
SYMATTR SpiceLine V=4 Irms=0 Rser=0 Lser=0 mfg="Murata" pn="GRM155R60G106ME15" type="X5R"
SYMBOL res 64 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 330
SYMBOL res 416 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 820k
SYMBOL schottky 112 -512 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res -176 -496 R0
SYMATTR InstName R4
SYMATTR Value 47k
SYMBOL cap -240 -400 R180
WINDOW 0 -27 61 Left 2
WINDOW 3 -37 8 Left 2
SYMATTR InstName C6
SYMATTR Value 10µ
SYMATTR Description Polarized Capacitor
SYMATTR Type polcap
SYMATTR SpiceLine V=4 Irms=0 Rser=0 Lser=0 mfg="Murata" pn="GRM155R60G106ME15" type="X5R"
SYMBOL res 496 -96 R0
SYMATTR InstName R9
SYMATTR Value 100
SYMBOL res -320 -96 R0
SYMATTR InstName R10
SYMATTR Value 1.5
SYMBOL pjf 48 -416 R90
WINDOW 0 -34 29 VRight 2
WINDOW 3 -9 -1 VRight 2
SYMATTR InstName J2
SYMATTR Value J175
SYMBOL OpAmps\\LT1057 912 80 R0
SYMATTR InstName U1
SYMBOL res 672 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R11
SYMATTR Value 5.1k
SYMBOL cap 752 112 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C7
SYMATTR Value 68n
SYMBOL res 688 192 R0
SYMATTR InstName R12
SYMATTR Value 13k
SYMBOL res 816 -32 R0
SYMATTR InstName R13
SYMATTR Value 6.2k
SYMBOL cap 704 16 R0
SYMATTR InstName C8
SYMATTR Value 15n
TEXT -80 472 Left 2 !.tran 0 10s 2s startup
TEXT -264 -616 Left 2 ;Edward Rawde's high purity sinewave oscillator. 22 Oct 2024

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 22/10/2024 4:10 pm, Edward Rawde wrote:

But I suspect that component tolerances and mismatched FETs will ruin it.

Otherwise it should be easy to get 60dB down on unwanted harmonics with a better filter.

FWIW I likely won't be here for the next week.

<snip>

My message was that the current sucked out of U2 through D1 and D2 was a
narrow spike, peaking at 0.3mA and repeating at 1kHz, which distorted
the voltage at the output of U2.

Your revised circuit persists with this mistake, and the filter you've
added around U1 doesn't do enough to compensate.

Using two FETs as your adjustable resistance does seem to get rid of the even-order harmonics, but it doesn't make enough difference to be worth
the effort.

I do worry about component tolerances, and they won't make much
difference to the circuit. Neither will mismatched FETs. The
capacitative feedthough via the gate into the FET conduction channels is probably more of a worry, and that's built into the LTSpice FET model.

Bad layout can wreck pretty much any well-designed circuit, let alone
badly designed ones. My professional career included a bit of cleaning
up such layouts.

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vf7slm$1e357$1@dont-email.me...

On 22/10/2024 4:10 pm, Edward Rawde wrote:

But I suspect that component tolerances and mismatched FETs will ruin it.

Otherwise it should be easy to get 60dB down on unwanted harmonics with a better filter.

FWIW I likely won't be here for the next week.

<snip>

My message was that the current sucked out of U2 through D1 and D2 was a narrow spike, peaking at 0.3mA and repeating at 1kHz,
which distorted the voltage at the output of U2.

Your revised circuit persists with this mistake, and the filter you've added around U1 doesn't do enough to compensate.

That's what I thought you'd say, because there are now two spikes, but it does seem to reduce distortion.
So I'd leave it in any experimental prototype and take the decision to remove it if real testing shows it's not sufficiently
beneficial.
The filter can be redesigned when a real circuit is tested. I didn't have time to do a more elaborate active filter.

Using two FETs as your adjustable resistance does seem to get rid of the even-order harmonics, but it doesn't make enough
difference to be worth the effort.

I do worry about component tolerances, and they won't make much difference to the circuit. Neither will mismatched FETs. The
capacitative feedthough via the gate into the FET conduction channels is probably more of a worry, and that's built into the
LTSpice FET model.

Bad layout can wreck pretty much any well-designed circuit, let alone badly designed ones. My professional career included a bit
of cleaning up such layouts.

I've had management think that a "proper" layout will turn a badly designed prototype circuit into something which does not need to
be redesigned.

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

"Edward Rawde" <invalid@invalid.invalid> wrote in message news:vf7c4h$1m5m$1@nnrp.usenet.blueworldhosting.com...

But I suspect that component tolerances and mismatched FETs will ruin it.

Can anyone tell me what causes the following feature of the circuit below?
This circuit is not exactly the same as the previous one but all versions seem to have this behaviour.

Run a simulation and view the output.

You can see that there's distortion until about 1.8 seconds when it disappears. View J1 or J2 gate voltage.
You can see that the crud suddenly reduces at 1.8 seconds.
What's causing that and is there a way to make the circuit always run in reduced crud mode?

I'll be back in about a week to thank whoever can explain this.

Version 4
SHEET 1 2196 916
WIRE 48 -576 16 -576
WIRE 544 -576 112 -576
WIRE 736 -512 688 -512
WIRE 864 -512 816 -512
WIRE -160 -496 -256 -496
WIRE -16 -496 -160 -496
WIRE 16 -496 16 -576
WIRE 16 -496 -16 -496
WIRE 48 -496 16 -496
WIRE 512 -496 112 -496
WIRE -160 -480 -160 -496
WIRE -256 -464 -256 -496
WIRE -16 -416 -16 -496
WIRE 800 -400 800 -416
WIRE 864 -384 864 -512
WIRE 864 -384 832 -384
WIRE 896 -384 864 -384
WIRE 1008 -384 976 -384
WIRE -256 -368 -256 -400
WIRE -160 -368 -160 -400
WIRE -160 -368 -256 -368
WIRE -48 -368 -160 -368
WIRE 144 -368 48 -368
WIRE 544 -368 544 -576
WIRE 560 -368 544 -368
WIRE 688 -368 688 -512
WIRE 688 -368 640 -368
WIRE 768 -368 688 -368
WIRE 864 -352 832 -352
WIRE 48 -336 16 -336
WIRE 544 -336 544 -368
WIRE 544 -336 112 -336
WIRE -256 -320 -256 -368
WIRE -256 -320 -304 -320
WIRE 800 -320 800 -336
WIRE -160 -256 -256 -256
WIRE -16 -256 -160 -256
WIRE 16 -256 16 -336
WIRE 16 -256 -16 -256
WIRE 48 -256 16 -256
WIRE 512 -256 512 -496
WIRE 512 -256 112 -256
WIRE 864 -256 864 -352
WIRE -160 -240 -160 -256
WIRE -256 -224 -256 -256
WIRE 512 -224 512 -256
WIRE -16 -176 -16 -256
WIRE -304 -128 -304 -320
WIRE -256 -128 -256 -160
WIRE -256 -128 -304 -128
WIRE -160 -128 -160 -160
WIRE -160 -128 -256 -128
WIRE -80 -128 -160 -128
WIRE -48 -128 -80 -128
WIRE 80 -128 48 -128
WIRE 144 -128 144 -368
WIRE 144 -128 80 -128
WIRE 160 -128 144 -128
WIRE 272 -128 240 -128
WIRE 320 -128 272 -128
WIRE 448 -128 400 -128
WIRE 512 -96 512 -144
WIRE 1008 -96 1008 -384
WIRE 1008 -96 512 -96
WIRE -304 -80 -304 -128
WIRE -80 -64 -80 -128
WIRE -32 -64 -80 -64
WIRE 80 -64 80 -128
WIRE 80 -64 48 -64
WIRE 832 -64 720 -64
WIRE 1056 -64 832 -64
WIRE 272 -16 272 -128
WIRE 320 -16 272 -16
WIRE 448 -16 448 -128
WIRE 448 -16 400 -16
WIRE 832 -16 832 -64
WIRE 272 16 272 -16
WIRE 272 16 48 16
WIRE 720 16 720 -64
WIRE -304 32 -304 0
WIRE 128 96 128 80
WIRE -272 112 -352 112
WIRE -208 112 -272 112
WIRE 48 112 48 16
WIRE 96 112 48 112
WIRE 912 112 912 96
WIRE 432 128 160 128
WIRE 448 128 448 -16
WIRE 448 128 432 128
WIRE 512 128 512 -96
WIRE 512 128 448 128
WIRE 576 128 512 128
WIRE 704 128 656 128
WIRE 720 128 720 80
WIRE 720 128 704 128
WIRE 752 128 720 128
WIRE 832 128 832 64
WIRE 832 128 816 128
WIRE 880 128 832 128
WIRE 96 144 -80 144
WIRE 1056 144 1056 -64
WIRE 1056 144 944 144
WIRE 1168 144 1056 144
WIRE 1264 144 1168 144
WIRE -352 160 -352 112
WIRE 880 160 848 160
WIRE -208 176 -208 112
WIRE 128 176 128 160
WIRE 912 192 912 176
WIRE 704 208 704 128
WIRE -80 224 -80 144
WIRE 16 224 -80 224
WIRE 224 224 16 224
WIRE 304 224 288 224
WIRE 432 224 432 128
WIRE 432 224 384 224
WIRE -80 240 -80 224
WIRE 16 240 16 224
WIRE 848 256 848 160
WIRE -352 336 -352 240
WIRE -352 336 -432 336
WIRE -80 336 -80 320
WIRE -32 336 -80 336
WIRE 16 336 16 304
WIRE 16 336 -32 336
WIRE -432 352 -432 336
WIRE -352 352 -352 336
WIRE -208 352 -208 240
WIRE -208 352 -352 352
WIRE 704 352 704 288
WIRE -32 368 -32 336
WIRE -352 432 -352 352
WIRE -208 448 -208 352
WIRE -352 608 -352 512
WIRE -272 608 -352 608
WIRE -208 608 -208 512
WIRE -208 608 -272 608
FLAG -432 352 0
FLAG 1168 144 output
FLAG -304 32 0
FLAG 848 256 0
FLAG 704 352 0
FLAG 912 96 V+
FLAG 912 192 V-
FLAG 128 80 V+
FLAG 128 176 V-
FLAG -272 112 V+
FLAG -272 608 V-
FLAG -32 368 0
FLAG 800 -416 V+
FLAG 800 -320 V-
FLAG 864 -256 0
SYMBOL voltage -352 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 10 135 Left 2
WINDOW 0 12 7 Left 2
WINDOW 3 15 104 Left 2
SYMATTR SpiceLine Rser=0.1
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 400 208 R90
WINDOW 0 -7 54 VBottom 2
WINDOW 3 37 50 VTop 2
SYMATTR InstName R1
SYMATTR Value 10.5k
SYMBOL cap 288 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 15n
SYMBOL cap 32 304 R180
WINDOW 0 -33 54 Left 2
WINDOW 3 -49 18 Left 2
SYMATTR InstName C2
SYMATTR Value 15n
SYMBOL polcap -224 176 R0
SYMATTR InstName C4
SYMATTR Value 100µ
SYMBOL OpAmps\\LT1057 128 64 R0
SYMATTR InstName U2
SYMBOL res -176 -256 R0
SYMATTR InstName R6
SYMATTR Value 47k
SYMBOL res 256 -144 R90
WINDOW 0 -1 46 VBottom 2
WINDOW 3 35 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 6.34k
SYMBOL res 416 -144 R90
WINDOW 0 -4 61 VBottom 2
WINDOW 3 39 55 VTop 2
SYMATTR InstName R8
SYMATTR Value 13k
SYMBOL schottky 48 -240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL njf 48 -176 R90
WINDOW 0 -37 23 VRight 2
WINDOW 3 -9 -3 VRight 2
SYMATTR InstName J1
SYMATTR Value J112
SYMBOL voltage -352 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 10 135 Left 2
WINDOW 0 10 0 Left 2
WINDOW 3 15 104 Left 2
SYMATTR SpiceLine Rser=0.1
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL polcap -224 448 R0
SYMATTR InstName C5
SYMATTR Value 100µ
SYMBOL res -96 224 R0
SYMATTR InstName R2
SYMATTR Value 10.5k
SYMBOL cap -240 -160 R180
WINDOW 0 -27 59 Left 2
WINDOW 3 -33 2 Left 2
SYMATTR InstName C3
SYMATTR Value 10µ
SYMATTR Description Polarized Capacitor
SYMATTR Type polcap
SYMATTR SpiceLine V=4 Irms=0 Rser=0 Lser=0 mfg="Murata" pn="GRM155R60G106ME15" type="X5R"
SYMBOL res 64 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 330
SYMBOL res 416 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 820k
SYMBOL schottky 112 -512 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res -176 -496 R0
SYMATTR InstName R4
SYMATTR Value 47k
SYMBOL cap -240 -400 R180
WINDOW 0 -27 61 Left 2
WINDOW 3 -37 8 Left 2
SYMATTR InstName C6
SYMATTR Value 10µ
SYMATTR Description Polarized Capacitor
SYMATTR Type polcap
SYMATTR SpiceLine V=4 Irms=0 Rser=0 Lser=0 mfg="Murata" pn="GRM155R60G106ME15" type="X5R"
SYMBOL res 496 -240 R0
SYMATTR InstName R9
SYMATTR Value 100
SYMBOL res -320 -96 R0
SYMATTR InstName R10
SYMATTR Value 1.5
SYMBOL pjf 48 -416 R90
WINDOW 0 -34 29 VRight 2
WINDOW 3 -9 -1 VRight 2
SYMATTR InstName J2
SYMATTR Value J175
SYMBOL OpAmps\\LT1057 912 80 R0
SYMATTR InstName U1
SYMBOL res 672 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R11
SYMATTR Value 5.1k
SYMBOL cap 752 112 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C7
SYMATTR Value 68n
SYMBOL res 688 192 R0
SYMATTR InstName R12
SYMATTR Value 13k
SYMBOL res 816 -32 R0
SYMATTR InstName R13
SYMATTR Value 6.2k
SYMBOL cap 704 16 R0
SYMATTR InstName C8
SYMATTR Value 10n
SYMBOL OpAmps\\LT1057 800 -432 M0
SYMATTR InstName U3
SYMBOL res 832 -528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R14
SYMATTR Value 10k
SYMBOL res 992 -400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R15
SYMATTR Value 10k
SYMBOL res 656 -384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R16
SYMATTR Value 100
SYMBOL schottky 112 -592 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D3
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL schottky 48 -320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D4
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
TEXT -80 472 Left 2 !.tran 0 10s 2s startup
TEXT -248 -640 Left 2 ;Edward Rawde's high purity sinewave oscillator. 22 Oct 2024

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On Tue, 22 Oct 2024 10:12:23 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vf7slm$1e357$1@dont-email.me...

On 22/10/2024 4:10 pm, Edward Rawde wrote:

But I suspect that component tolerances and mismatched FETs will ruin it. >>>
Otherwise it should be easy to get 60dB down on unwanted harmonics with a better filter.

FWIW I likely won't be here for the next week.

<snip>

My message was that the current sucked out of U2 through D1 and D2 was a narrow spike, peaking at 0.3mA and repeating at 1kHz,
which distorted the voltage at the output of U2.

Your revised circuit persists with this mistake, and the filter you've added around U1 doesn't do enough to compensate.

That's what I thought you'd say, because there are now two spikes, but it does seem to reduce distortion.
So I'd leave it in any experimental prototype and take the decision to remove it if real testing shows it's not sufficiently
beneficial.
The filter can be redesigned when a real circuit is tested. I didn't have time to do a more elaborate active filter.

If you do build an ultra-low-distortion oscillator, how would you
measure the distortion?

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

"john larkin" <jl@glen--canyon.com> wrote in message news:91qfhj1tbi1ouh0cihrsjghk1q0t9ke345@4ax.com...

On Tue, 22 Oct 2024 10:12:23 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vf7slm$1e357$1@dont-email.me...

On 22/10/2024 4:10 pm, Edward Rawde wrote:

But I suspect that component tolerances and mismatched FETs will ruin it. >>>>
Otherwise it should be easy to get 60dB down on unwanted harmonics with a better filter.

FWIW I likely won't be here for the next week.

<snip>

My message was that the current sucked out of U2 through D1 and D2 was a narrow spike, peaking at 0.3mA and repeating at 1kHz,
which distorted the voltage at the output of U2.

Your revised circuit persists with this mistake, and the filter you've added around U1 doesn't do enough to compensate.

That's what I thought you'd say, because there are now two spikes, but it does seem to reduce distortion.
So I'd leave it in any experimental prototype and take the decision to remove it if real testing shows it's not sufficiently
beneficial.
The filter can be redesigned when a real circuit is tested. I didn't have time to do a more elaborate active filter.

If you do build an ultra-low-distortion oscillator, how would you
measure the distortion?

I'd probably ask the designers of the circuit Bill Sloman referenced, how they measured -110dB

https://www.analog.com/media/en/technical-documentation/application-notes/AN132f.pdf

I'd be happy with 70dB but I doubt that's achievable with the FET circuit.




--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 23/10/2024 5:02 am, john larkin wrote:

On Tue, 22 Oct 2024 10:12:23 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vf7slm$1e357$1@dont-email.me...

On 22/10/2024 4:10 pm, Edward Rawde wrote:

But I suspect that component tolerances and mismatched FETs will ruin it. >>>>
Otherwise it should be easy to get 60dB down on unwanted harmonics with a better filter.

FWIW I likely won't be here for the next week.

<snip>

My message was that the current sucked out of U2 through D1 and D2 was a narrow spike, peaking at 0.3mA and repeating at 1kHz,
which distorted the voltage at the output of U2.

Your revised circuit persists with this mistake, and the filter you've added around U1 doesn't do enough to compensate.

That's what I thought you'd say, because there are now two spikes, but it does seem to reduce distortion.
So I'd leave it in any experimental prototype and take the decision to remove it if real testing shows it's not sufficiently
beneficial.
The filter can be redesigned when a real circuit is tested. I didn't have time to do a more elaborate active filter.

If you do build an ultra-low-distortion oscillator, how would you
measure the distortion?

Put a spectrum analyser on the output and measure the harmonic content.

The number cruncher's version of that is to digitise the sine wave with
the best A/D converter you can get, fit a sine wave to the data and
average the deviations from that closely fitted sine wave.

Random noise will go down as you average over more cycles. The
distortion won't.

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 23/10/2024 1:12 am, Edward Rawde wrote:

"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vf7slm$1e357$1@dont-email.me...

On 22/10/2024 4:10 pm, Edward Rawde wrote:

But I suspect that component tolerances and mismatched FETs will ruin it. >>>
Otherwise it should be easy to get 60dB down on unwanted harmonics with a better filter.

FWIW I likely won't be here for the next week.

<snip>

My message was that the current sucked out of U2 through D1 and D2 was a narrow spike, peaking at 0.3mA and repeating at 1kHz,
which distorted the voltage at the output of U2.

Your revised circuit persists with this mistake, and the filter you've added around U1 doesn't do enough to compensate.

That's what I thought you'd say, because there are now two spikes, but it does seem to reduce distortion.

Two spikes inject even more high frequency harmonics into the circuit as
a whole. Some of them may cancel.

So I'd leave it in any experimental prototype and take the decision to remove it if real testing shows it's not sufficiently
beneficial.

There are other ways of measuring the amplitude of the output, and most
of them inject less high frequency hash into the power supplies.
Injecting high frequency hash into the op amp that is generating the
"high purity sine wave" if particulary silly.

The filter can be redesigned when a real circuit is tested. I didn't have time to do a more elaborate active filter.

Active filters can have nasty problems when the noise they are being
asked to reject is at a frequency where the op amp doesn't have much gain.

Using two FETs as your adjustable resistance does seem to get rid of the even-order harmonics, but it doesn't make enough
difference to be worth the effort.

I do worry about component tolerances, and they won't make much difference to the circuit. Neither will mismatched FETs. The
capacitative feedthough via the gate into the FET conduction channels is probably more of a worry, and that's built into the
LTSpice FET model.

Bad layout can wreck pretty much any well-designed circuit, let alone badly designed ones. My professional career included a bit
of cleaning up such layouts.

I've had management think that a "proper" layout will turn a badly designed prototype circuit into something which does not need to
be redesigned.

I've had some daft managers, but none of them was that daft.

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
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On Tue, 22 Oct 2024 12:53:06 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

"Edward Rawde" <invalid@invalid.invalid> wrote in message news:vf7c4h$1m5m$1@nnrp.usenet.blueworldhosting.com...

But I suspect that component tolerances and mismatched FETs will ruin it.

Can anyone tell me what causes the following feature of the circuit below? >This circuit is not exactly the same as the previous one but all versions seem to have this behaviour.

Run a simulation and view the output.

You can see that there's distortion until about 1.8 seconds when it disappears.
View J1 or J2 gate voltage.
You can see that the crud suddenly reduces at 1.8 seconds.
What's causing that and is there a way to make the circuit always run in reduced crud mode?

I'll be back in about a week to thank whoever can explain this.

If this was a real lab with real hardware and test equipment,
I'd need to see your test settup, because that's usually the
reason you get 'strange' test results.

1.5sec and 2sec plots both 'look' the same here - full of
crud.

Different crud, depending on whether .jpg or bmp formats . . . ;-]

RL

--- SoupGate-Win32 v1.05
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On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

But I suspect that component tolerances and mismatched FETs will ruin it.

The very best bulk metal foil resistors have voltage-resistance
coefficients of a few ppm/volt. Most resistors are much worse.

Just the resistors can kill distortion specs. At low frequencies,
self-heating and tempco can add distortion too; the old HP oscillators
had that effect from the lamp filament.

DGMS on capacitor nonlinearity.

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 23/10/2024 3:53 am, Edward Rawde wrote:

"Edward Rawde" <invalid@invalid.invalid> wrote in message news:vf7c4h$1m5m$1@nnrp.usenet.blueworldhosting.com...

But I suspect that component tolerances and mismatched FETs will
ruin it.

Can anyone tell me what causes the following feature of the circuit
below? This circuit is not exactly the same as the previous one but
all versions seem to have this behaviour.

Run a simulation and view the output.

You can see that there's distortion until about 1.8 seconds when it disappears. View J1 or J2 gate voltage. You can see that the crud
suddenly reduces at 1.8 seconds. What's causing that and is there a
way to make the circuit always run in reduced crud mode?

I'll be back in about a week to thank whoever can explain this.

I can't see any crud. And comparing the FFT's of the outputs of U2 and
and the "filtered" output at U1, the third harmonic content is much the
same.

Just for kicks, I added a third op amp - an LT1056 - as a unity gain
follower on U2's output - on to drive R9 (in the
same way that U3 drives R16) to keep the spikey rectifier drive current
out of U2 - the op amp generating the "pure" sine wave.

It didn't make any difference.

My guess is that most of the harmonic content is from the 1mV sawtooth
on the two FET gates which capacitatively couples into the FET
conduction channel.

An opto-FET might do better.

https://www.mouser.com/datasheet/2/149/h11f1m-185284.pdf

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
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On 24/10/2024 4:44 am, john larkin wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

But I suspect that component tolerances and mismatched FETs will ruin it.

The very best bulk metal foil resistors have voltage-resistance
coefficients of a few ppm/volt. Most resistors are much worse.

Metal film resistors aren't all that much worse than bulk foil
resistors, and they are pretty cheap aznd widely available.

Just the resistors can kill distortion specs.

Not that you can cite an example

At low frequencies, self-heating and tempco can add distortion too;

Pull the other leg.

The old HP oscillators
had that effect from the lamp filament.

The lamp filaments ran rather hotter.

DGMS on capacitor nonlinearity.

The capacitors and resistors would have to remarkably bad to make much difference to a well-designed Wein bridge.

You've already got started on making an ass of yourself about resistor non-linearities. Making bizarre claims about capacitors is more of the same.

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
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On Thu, 24 Oct 2024 15:41:18 +1100, Bill Sloman <bill.sloman@ieee.org>
wrote:

On 23/10/2024 3:53 am, Edward Rawde wrote:

"Edward Rawde" <invalid@invalid.invalid> wrote in message
news:vf7c4h$1m5m$1@nnrp.usenet.blueworldhosting.com...

But I suspect that component tolerances and mismatched FETs will
ruin it.

Can anyone tell me what causes the following feature of the circuit
below? This circuit is not exactly the same as the previous one but
all versions seem to have this behaviour.

Run a simulation and view the output.

You can see that there's distortion until about 1.8 seconds when it
disappears. View J1 or J2 gate voltage. You can see that the crud
suddenly reduces at 1.8 seconds. What's causing that and is there a
way to make the circuit always run in reduced crud mode?

I'll be back in about a week to thank whoever can explain this.

I can't see any crud. And comparing the FFT's of the outputs of U2 and
and the "filtered" output at U1, the third harmonic content is much the
same.

Just for kicks, I added a third op amp - an LT1056 - as a unity gain
follower on U2's output - on to drive R9 (in the
same way that U3 drives R16) to keep the spikey rectifier drive current
out of U2 - the op amp generating the "pure" sine wave.

It didn't make any difference.

My guess is that most of the harmonic content is from the 1mV sawtooth
on the two FET gates which capacitatively couples into the FET
conduction channel.

An opto-FET might do better.

https://www.mouser.com/datasheet/2/149/h11f1m-185284.pdf

I'm curious. By 'seeing' crud - what measuring technique is being
used?

Built-in LTspice FFT?

Would be easier to compare if the measurement 'method' was included
in the sim. Then, at least the test method could be inspected for
errors.

Distortion here is quite visible in the simple LTspice waveform
viewer. If you can 'see' it, it's bound to be measurable above
a milli-percentage. Yes-No?

RL

--- SoupGate-Win32 v1.05
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On Thu, 24 Oct 2024 20:39:03 +1100, Bill Sloman <bill.sloman@ieee.org>
wrote:

On 24/10/2024 4:44 am, john larkin wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

But I suspect that component tolerances and mismatched FETs will ruin it. >>

The very best bulk metal foil resistors have voltage-resistance
coefficients of a few ppm/volt. Most resistors are much worse.

Metal film resistors aren't all that much worse than bulk foil
resistors, and they are pretty cheap aznd widely available.

Just the resistors can kill distortion specs.

Not that you can cite an example

At low frequencies, self-heating and tempco can add distortion too;

Pull the other leg.

The old HP oscillators
had that effect from the lamp filament.

The lamp filaments ran rather hotter.

DGMS on capacitor nonlinearity.

The capacitors and resistors would have to remarkably bad to make much >difference to a well-designed Wein bridge.

You've already got started on making an ass of yourself about resistor >non-linearities. Making bizarre claims about capacitors is more of the same.

Gosh, you keep getting nastier and crazier every year. Your only
function now seems to be to generate childish insults aimed at most
everyone.

Here's some C-V notes. Series AC-coupling caps, or caps used in
filters, can introduce distortion too.

https://www.dropbox.com/scl/fo/akiyipqep6n67glfjhcea/ACfQ6By9LRZPKey4tgvpdDE?rlkey=is0vbs7m6xft5u9as5r8eyp30&dl=0

It's sort of outrageous that most ceramic cap data sheets specify
capacitance and voltage and hide the fact that you don't get both.

Film caps can have C-V effects too, and those can matter at PPM
distortion levels.

One could make a parametric amplifier using cap C-V effect.

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

john larkin <jl@glen--canyon.com> wrote:

On Thu, 24 Oct 2024 20:39:03 +1100, Bill Sloman <bill.sloman@ieee.org>
wrote:

On 24/10/2024 4:44 am, john larkin wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

But I suspect that component tolerances and mismatched FETs will ruin it. >>

The very best bulk metal foil resistors have voltage-resistance
coefficients of a few ppm/volt. Most resistors are much worse.

Metal film resistors aren't all that much worse than bulk foil
resistors, and they are pretty cheap aznd widely available.

Just the resistors can kill distortion specs.

Not that you can cite an example

At low frequencies, self-heating and tempco can add distortion too;

Pull the other leg.

The old HP oscillators
had that effect from the lamp filament.

The lamp filaments ran rather hotter.

DGMS on capacitor nonlinearity.

The capacitors and resistors would have to remarkably bad to make much >difference to a well-designed Wein bridge.

You've already got started on making an ass of yourself about resistor >non-linearities. Making bizarre claims about capacitors is more of the same.

Gosh, you keep getting nastier and crazier every year. Your only
function now seems to be to generate childish insults aimed at most
everyone.

Here's some C-V notes. Series AC-coupling caps, or caps used in
filters, can introduce distortion too.

https://www.dropbox.com/scl/fo/akiyipqep6n67glfjhcea/ACfQ6By9LRZPKey4tgvpd DE?rlkey=is0vbs7m6xft5u9as5r8eyp30&dl=0

It's sort of outrageous that most ceramic cap data sheets specify
capacitance and voltage and hide the fact that you don't get both.

Film caps can have C-V effects too, and those can matter at PPM
distortion levels.

One could make a parametric amplifier using cap C-V effect.

Some ceramic caps make rather poor-quality contact microphones, so don't
use them in audio pre-amps.


--
~ Liz Tuddenham ~
(Remove the ".invalid"s and add ".co.uk" to reply)
www.poppyrecords.co.uk

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On Thu, 24 Oct 2024 23:19:52 +0100, John R Walliker
<jrwalliker@gmail.com> wrote:

On 24/10/2024 21:56, Liz Tuddenham wrote:

john larkin <jl@glen--canyon.com> wrote:

On Thu, 24 Oct 2024 20:39:03 +1100, Bill Sloman <bill.sloman@ieee.org>
wrote:

On 24/10/2024 4:44 am, john larkin wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

But I suspect that component tolerances and mismatched FETs will ruin it.

The very best bulk metal foil resistors have voltage-resistance
coefficients of a few ppm/volt. Most resistors are much worse.

Metal film resistors aren't all that much worse than bulk foil
resistors, and they are pretty cheap aznd widely available.

Just the resistors can kill distortion specs.

Not that you can cite an example

At low frequencies, self-heating and tempco can add distortion too;

Pull the other leg.

The old HP oscillators
had that effect from the lamp filament.

The lamp filaments ran rather hotter.

DGMS on capacitor nonlinearity.

The capacitors and resistors would have to remarkably bad to make much >>>> difference to a well-designed Wein bridge.

You've already got started on making an ass of yourself about resistor >>>> non-linearities. Making bizarre claims about capacitors is more of the same.

Gosh, you keep getting nastier and crazier every year. Your only
function now seems to be to generate childish insults aimed at most
everyone.

Here's some C-V notes. Series AC-coupling caps, or caps used in
filters, can introduce distortion too.

https://www.dropbox.com/scl/fo/akiyipqep6n67glfjhcea/ACfQ6By9LRZPKey4tgvpd >>> DE?rlkey=is0vbs7m6xft5u9as5r8eyp30&dl=0

It's sort of outrageous that most ceramic cap data sheets specify
capacitance and voltage and hide the fact that you don't get both.

Film caps can have C-V effects too, and those can matter at PPM
distortion levels.

One could make a parametric amplifier using cap C-V effect.

Some ceramic caps make rather poor-quality contact microphones, so don't
use them in audio pre-amps.

... but COG/NPO ceramics are very well suited to this application.

John

They tend to be small values. We use one 10 nF part. Digikey offers a
0.88 uF C0G for $29. Each!

I had some N4700s cooked up special, to temperature compensate an LC oscillator.

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On Fri, 25 Oct 2024 00:44:23 -0000 (UTC), Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:

john larkin <jl@glen--canyon.com> wrote:

On Thu, 24 Oct 2024 23:19:52 +0100, John R Walliker
<jrwalliker@gmail.com> wrote:

On 24/10/2024 21:56, Liz Tuddenham wrote:

john larkin <jl@glen--canyon.com> wrote:

On Thu, 24 Oct 2024 20:39:03 +1100, Bill Sloman <bill.sloman@ieee.org> >>>>> wrote:

On 24/10/2024 4:44 am, john larkin wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

But I suspect that component tolerances and mismatched FETs will ruin it.

The very best bulk metal foil resistors have voltage-resistance
coefficients of a few ppm/volt. Most resistors are much worse.

Metal film resistors aren't all that much worse than bulk foil
resistors, and they are pretty cheap aznd widely available.

Just the resistors can kill distortion specs.

Not that you can cite an example

At low frequencies, self-heating and tempco can add distortion too; >>>>>>

Pull the other leg.

The old HP oscillators
had that effect from the lamp filament.

The lamp filaments ran rather hotter.

DGMS on capacitor nonlinearity.

The capacitors and resistors would have to remarkably bad to make much >>>>>> difference to a well-designed Wein bridge.

You've already got started on making an ass of yourself about resistor >>>>>> non-linearities. Making bizarre claims about capacitors is more of the same.

Gosh, you keep getting nastier and crazier every year. Your only
function now seems to be to generate childish insults aimed at most
everyone.

Here's some C-V notes. Series AC-coupling caps, or caps used in
filters, can introduce distortion too.

https://www.dropbox.com/scl/fo/akiyipqep6n67glfjhcea/ACfQ6By9LRZPKey4tgvpd
DE?rlkey=is0vbs7m6xft5u9as5r8eyp30&dl=0

It's sort of outrageous that most ceramic cap data sheets specify
capacitance and voltage and hide the fact that you don't get both.

Film caps can have C-V effects too, and those can matter at PPM
distortion levels.

One could make a parametric amplifier using cap C-V effect.

Some ceramic caps make rather poor-quality contact microphones, so don't >>>> use them in audio pre-amps.

... but COG/NPO ceramics are very well suited to this application.

John

They tend to be small values. We use one 10 nF part. Digikey offers a
0.88 uF C0G for $29. Each!

I had some N4700s cooked up special, to temperature compensate an LC
oscillator.

Having a reel or two of reasonably consistent NTC caps would be a win.

The datasheet limits are generally +-30% IME, so it takes a bunch of >cut-and-try to get good compensation. With repeatable parts, ideally you’d >only have to do it once.

How good is the consistency of your custom ones?

Cheers

Phil Hobbs

I've only measured the TCs of a couple; both were about -5200. They do
seem to compensate the oscillators well in production. The main
problems are the inductor and the FR4 capacitance.

The NTCs are 3.3 pF and are padded with a series NP0, also 3.3. Net
LC capacitance is around 50 pF, so the NTC cap has a small influence.

Capax made them for us.

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

john larkin <jl@glen--canyon.com> wrote:

On Thu, 24 Oct 2024 23:19:52 +0100, John R Walliker
<jrwalliker@gmail.com> wrote:

On 24/10/2024 21:56, Liz Tuddenham wrote:

john larkin <jl@glen--canyon.com> wrote:

On Thu, 24 Oct 2024 20:39:03 +1100, Bill Sloman <bill.sloman@ieee.org> >>>> wrote:

On 24/10/2024 4:44 am, john larkin wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

But I suspect that component tolerances and mismatched FETs will ruin it.

The very best bulk metal foil resistors have voltage-resistance
coefficients of a few ppm/volt. Most resistors are much worse.

Metal film resistors aren't all that much worse than bulk foil
resistors, and they are pretty cheap aznd widely available.

Just the resistors can kill distortion specs.

Not that you can cite an example

At low frequencies, self-heating and tempco can add distortion too; >>>>>

Pull the other leg.

The old HP oscillators
had that effect from the lamp filament.

The lamp filaments ran rather hotter.

DGMS on capacitor nonlinearity.

The capacitors and resistors would have to remarkably bad to make much >>>>> difference to a well-designed Wein bridge.

You've already got started on making an ass of yourself about resistor >>>>> non-linearities. Making bizarre claims about capacitors is more of the same.

Gosh, you keep getting nastier and crazier every year. Your only
function now seems to be to generate childish insults aimed at most
everyone.

Here's some C-V notes. Series AC-coupling caps, or caps used in
filters, can introduce distortion too.

https://www.dropbox.com/scl/fo/akiyipqep6n67glfjhcea/ACfQ6By9LRZPKey4tgvpd >>>> DE?rlkey=is0vbs7m6xft5u9as5r8eyp30&dl=0

It's sort of outrageous that most ceramic cap data sheets specify
capacitance and voltage and hide the fact that you don't get both.

Film caps can have C-V effects too, and those can matter at PPM
distortion levels.

One could make a parametric amplifier using cap C-V effect.

Some ceramic caps make rather poor-quality contact microphones, so don't >>> use them in audio pre-amps.

... but COG/NPO ceramics are very well suited to this application.

John

They tend to be small values. We use one 10 nF part. Digikey offers a
0.88 uF C0G for $29. Each!

I had some N4700s cooked up special, to temperature compensate an LC oscillator.

Having a reel or two of reasonably consistent NTC caps would be a win.

The datasheet limits are generally +-30% IME, so it takes a bunch of cut-and-try to get good compensation. With repeatable parts, ideally you’d only have to do it once.

How good is the consistency of your custom ones?

Cheers

Phil Hobbs


--
Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 25/10/2024 4:37 am, john larkin wrote:

On Thu, 24 Oct 2024 20:39:03 +1100, Bill Sloman <bill.sloman@ieee.org>
wrote:

On 24/10/2024 4:44 am, john larkin wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

But I suspect that component tolerances and mismatched FETs will ruin it. >>>

The very best bulk metal foil resistors have voltage-resistance
coefficients of a few ppm/volt. Most resistors are much worse.

Metal film resistors aren't all that much worse than bulk foil
resistors, and they are pretty cheap aznd widely available.

Just the resistors can kill distortion specs.

Not that you can cite an example

At low frequencies, self-heating and tempco can add distortion too;

Pull the other leg.

The old HP oscillators
had that effect from the lamp filament.

The lamp filaments ran rather hotter.

DGMS on capacitor nonlinearity.

The capacitors and resistors would have to remarkably bad to make much
difference to a well-designed Wein bridge.

You've already got started on making an ass of yourself about resistor
non-linearities. Making bizarre claims about capacitors is more of the same.

Gosh, you keep getting nastier and crazier every year.

I'm sure it makes you feel better to think that.

Your only function now seems to be to generate childish insults aimed at most everyone.

By which you mean that I don't flatter you as fulsomely as you think you deserve.

Here's some C-V notes. Series AC-coupling caps, or caps used in
filters, can introduce distortion too.

You need ceramic caps - with pretty horrible voltage dependent
capacitance - to get that. NP100 is roughly as good as mica or
polypropylene.

https://www.dropbox.com/scl/fo/akiyipqep6n67glfjhcea/ACfQ6By9LRZPKey4tgvpdDE?rlkey=is0vbs7m6xft5u9as5r8eyp30&dl=0

It's sort of outrageous that most ceramic cap data sheets specify
capacitance and voltage and hide the fact that you don't get both.

Film caps can have C-V effects too, and those can matter at PPM
distortion levels.

The 1% tolerance 15nF caps that Edward Rawde would use - if he ever
built his Wein bridge - use a polypropylene dielectric film which is
remarkably good - better than polycarbonate (which is marginally better
than polyester).

One could make a parametric amplifier using cap C-V effect.

But nobody has, certainly not with plastic film capacitors.

You really do seem to be sliding off into senility.

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 25/10/2024 4:48 am, JM wrote:

On Thu, 24 Oct 2024 16:16:49 +0100, JM <sunaecoNoSpam@gmail.com> wrote:

On Wed, 23 Oct 2024 02:05:52 +0100, JM <sunaecoNoSpam@gmail.com> wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde" <invalid@invalid.invalid> wrote:

But I suspect that component tolerances and mismatched FETs will ruin it. >>>>
Otherwise it should be easy to get 60dB down on unwanted harmonics with a better filter.

FWIW I likely won't be here for the next week.

If you actually need a low distortion oscillator look for Viktor Mickevic's designs on diyaudio. I've attached a schematic.

PK



It seems that I have a problem posting encoded binariesto this group with my provider. Attached is a link instead.

https://1drv.ms/u/c/1af24d72a509cd48/EakMPPRi-pdLgaAKtJ2rrwwBNMGZZsy84MV2QoH1dPcZJQ?e=o59V9a

And that links to an incorrect schematic - the rectified output tap is connected to the wrong node. Might be other errors..

Even so, the third harmonic is 78dB below the fundamental. The
simulation runs slowly on my computer, so it may take me a while to get
the schematic to where the designer intended it to be.

The choice of op amp is what I'd expect from an audio group - it does
seem to be a low distortion part.

I just seem to have wrecked the .raw file from the simulation, so it may
be a while before I have more to say.

--
Bill Sloman, Sydney

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 25/10/2024 1:32 am, legg wrote:

On Thu, 24 Oct 2024 15:41:18 +1100, Bill Sloman <bill.sloman@ieee.org>
wrote:

On 23/10/2024 3:53 am, Edward Rawde wrote:

"Edward Rawde" <invalid@invalid.invalid> wrote in message
news:vf7c4h$1m5m$1@nnrp.usenet.blueworldhosting.com...

But I suspect that component tolerances and mismatched FETs will
ruin it.

Can anyone tell me what causes the following feature of the circuit
below? This circuit is not exactly the same as the previous one but
all versions seem to have this behaviour.

Run a simulation and view the output.

You can see that there's distortion until about 1.8 seconds when it
disappears. View J1 or J2 gate voltage. You can see that the crud
suddenly reduces at 1.8 seconds. What's causing that and is there a
way to make the circuit always run in reduced crud mode?

I'll be back in about a week to thank whoever can explain this.

I can't see any crud. And comparing the FFT's of the outputs of U2 and
and the "filtered" output at U1, the third harmonic content is much the
same.

Just for kicks, I added a third op amp - an LT1056 - as a unity gain
follower on U2's output - on to drive R9 (in the
same way that U3 drives R16) to keep the spikey rectifier drive current
out of U2 - the op amp generating the "pure" sine wave.

It didn't make any difference.

My guess is that most of the harmonic content is from the 1mV sawtooth
on the two FET gates which capacitatively couples into the FET
conduction channel.

An opto-FET might do better.

https://www.mouser.com/datasheet/2/149/h11f1m-185284.pdf

I'm curious. By 'seeing' crud - what measuring technique is being
used?

Built-in LTspice FFT?

Would be easier to compare if the measurement 'method' was included
in the sim. Then, at least the test method could be inspected for
errors.

Distortion here is quite visible in the simple LTspice waveform
viewer. If you can 'see' it, it's bound to be measurable above
a milli-percentage. Yes-No?

"Crud" is a pretty unspecific term, and Edward Rawde didn't specify what
he was seeing in a way that directed me to any feature visible to me in
the output waveform.

There's a lot more data in the .raw file than you can see even on a
cycle by cycle waveform plot, and the mechanics of translating that data
into lines we can see on the screen may produce it own distortions.

--
Bill sloman, Sydney

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 25/10/2024 3:25 pm, Bill Sloman wrote:

On 25/10/2024 4:48 am, JM wrote:

On Thu, 24 Oct 2024 16:16:49 +0100, JM <sunaecoNoSpam@gmail.com> wrote:

On Wed, 23 Oct 2024 02:05:52 +0100, JM <sunaecoNoSpam@gmail.com> wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

But I suspect that component tolerances and mismatched FETs will
ruin it.

Otherwise it should be easy to get 60dB down on unwanted harmonics
with a better filter.

FWIW I likely won't be here for the next week.

If you actually need a low distortion oscillator look for Viktor
Mickevic's designs on diyaudio.   I've attached a schematic.

PK



It seems that I have a problem posting encoded binariesto this group
with my provider.  Attached is a link instead.

https://1drv.ms/u/c/1af24d72a509cd48/EakMPPRi-pdLgaAKtJ2rrwwBNMGZZsy84MV2QoH1dPcZJQ?e=o59V9a

And that links to an incorrect schematic - the rectified output tap is
connected to the wrong node.  Might be other errors..

Even so, the third harmonic is 78dB below the fundamental. The
simulation runs slowly on my computer, so it may take me a while to get
the schematic to where the designer intended it to be.

The choice of op amp is what I'd expect from an audio group - it does
seem to be a low distortion part.

I just seem to have wrecked the .raw file from the simulation, so it may
be a while before I have more to say.

The file wasn't wrecked, just huge (4.063 GB) and slow to load, despite
the fact that I've a solid state disk on my computer put in to hold
LTSpice .raw files and load them tolerably quickly.

The circuit uses a half-wave rectifier, then runs the error signal into
an integrator wrapped around U4. C4 -at 6.8u - is a biggish integrating capacitor. R7 - at 120k - has the main purpose of stabilising the
feeback loop controlling the amplitude and also delivers around 6mV of
1kHz sinusoidal ripple into the gate of the FET. There about 12mV of
1kHz sine wave across the FET channel so this minimises any channel
modulation. Ingenious.

It would have been even move impressive if he'd intended to do that from
the start, but R5 and R6 make look like it was an afterthought.

My feeling is that an AD734 could do better. Jim Williams did better
with his FET controlled version, but I've no idea how.

78dB below the fundamental is respectable, but not impressive.

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 25/10/2024 7:45 pm, JM wrote:

On Fri, 25 Oct 2024 09:25:31 +0100, JM <sunaecoNoSpam@gmail.com> wrote:

On Fri, 25 Oct 2024 18:16:26 +1100, Bill Sloman <bill.sloman@ieee.org> wrote:

On 25/10/2024 3:25 pm, Bill Sloman wrote:

On 25/10/2024 4:48 am, JM wrote:

On Thu, 24 Oct 2024 16:16:49 +0100, JM <sunaecoNoSpam@gmail.com> wrote: >>>>>

On Wed, 23 Oct 2024 02:05:52 +0100, JM <sunaecoNoSpam@gmail.com> wrote: >>>>>>

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

But I suspect that component tolerances and mismatched FETs will >>>>>>>> ruin it.

Otherwise it should be easy to get 60dB down on unwanted harmonics >>>>>>>> with a better filter.

FWIW I likely won't be here for the next week.

If you actually need a low distortion oscillator look for Viktor >>>>>>> Mickevic's designs on diyaudio.   I've attached a schematic.

PK



It seems that I have a problem posting encoded binariesto this group >>>>>> with my provider.  Attached is a link instead.

https://1drv.ms/u/c/1af24d72a509cd48/EakMPPRi-pdLgaAKtJ2rrwwBNMGZZsy84MV2QoH1dPcZJQ?e=o59V9a

And that links to an incorrect schematic - the rectified output tap is >>>>> connected to the wrong node.  Might be other errors..

Even so, the third harmonic is 78dB below the fundamental. The
simulation runs slowly on my computer, so it may take me a while to get >>>> the schematic to where the designer intended it to be.

The choice of op amp is what I'd expect from an audio group - it does
seem to be a low distortion part.

I just seem to have wrecked the .raw file from the simulation, so it may >>>> be a while before I have more to say.

The file wasn't wrecked, just huge (4.063 GB) and slow to load, despite
the fact that I've a solid state disk on my computer put in to hold
LTSpice .raw files and load them tolerably quickly.

The circuit uses a half-wave rectifier, then runs the error signal into
an integrator wrapped around U4. C4 -at 6.8u - is a biggish integrating
capacitor. R7 - at 120k - has the main purpose of stabilising the
feeback loop controlling the amplitude and also delivers around 6mV of
1kHz sinusoidal ripple into the gate of the FET. There about 12mV of
1kHz sine wave across the FET channel so this minimises any channel
modulation. Ingenious.

It would have been even move impressive if he'd intended to do that from >>> the start, but R5 and R6 make look like it was an afterthought.

My feeling is that an AD734 could do better. Jim Williams did better
with his FET controlled version, but I've no idea how.

78dB below the fundamental is respectable, but not impressive.

On the bench the THD in the audio band is approx. -140dB (I think - it's years since I looked into the performance of this). Not measured by myself, but there are hundreds of measurements documented on diyaudio and other audio forums. Viktor used to

(possibly still does) sell these oscillators on ebay for a few pounds. I have a couple and borrowed an audio precision analyser to test them - I think the AP measured to about -115dB, and the oscillators performed better than that. That level of
distortion was much better than I required so I didn't attempt the find the true value.

I doubt if LTSpice will give accurate distortion figures with the simulation models I provided, they have not been verified in isolation. Very few opamp macro models provide realistic distortion results.

There may be a more recent schematic available as this circuit has been tweaked over the years.

I think when I simulated this only the 2nd or 3rd harmonic was visable in a 1 second FFT at about -120dB. However, I didn't spend any time on it, just enough to see that it did actually oscillate, and posted it only because it's real performance is

very well documented, and it may be of use to the OP. I could spend some time validating the models and simulating in spectre but real measurments trump simulations.

I still had the .raw file available. I measure the 3rd harmonic at -118dB with a blackman-harris window with a 1s FFT.

Here's the .asc file that I ran

Version 4
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SYMATTR InstName C2
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SYMBOL OpAmps\\opamp2 -208 96 R0
WINDOW 3 6 168 Left 2
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SYMBOL res -176 32 R90
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SYMATTR Value 10.02K
SYMBOL cap -160 -96 R90
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SYMBOL diode -528 656 R90
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TEXT -1128 864 Left 2 !.MODEL MMBF4391 NJF VTO=-4.6 BETA=0.02779
LAMBDA=0.00595 RD=1 RS=1 IS=1e-14 CGD=14p CGS=10.5p PB=1 B=1 KF=1e-18
AF=1 FC=0.5 mfg=Motorola
TEXT -1248 600 Right 2 !.tran 0 5 4.9 1e-6 startup
TEXT -1464 656 Left 2 !.lib LME49710.lib
TEXT -1464 696 Left 2 !.lib TL072.lib

I had to move all the resistors to get them where they were clearly
intended to be, and if Edward Rawde's experience is any guide you will
have to move them back. I haven't included the two .lib files from your
zipped folder. Why you needed to include a library for the TL072 escapes
me - it's a jelly-bean part.

Maybe one of the connections got messed up in the process - you did say
that one of them was misplaced.

I am running LTSpice 17 (XVII) and it was updated recently.

My FFT on V(out) had the third harmonic -78dB below the fundamental, not -118dB.

Checking again over the last one 1 second and the last 10 seconds, it's
only -46dB, which is very odd.

Viktor Mickevic's design does look pretty good, so I suspect that
LTSpice 17 might not be performing as well as it should.


--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 26/10/2024 12:15 am, JM wrote:

On Fri, 25 Oct 2024 23:03:32 +1100, Bill Sloman <bill.sloman@ieee.org> wrote:

On 25/10/2024 7:45 pm, JM wrote:

On Fri, 25 Oct 2024 09:25:31 +0100, JM <sunaecoNoSpam@gmail.com> wrote:

On Fri, 25 Oct 2024 18:16:26 +1100, Bill Sloman <bill.sloman@ieee.org> wrote:

On 25/10/2024 3:25 pm, Bill Sloman wrote:

On 25/10/2024 4:48 am, JM wrote:

On Thu, 24 Oct 2024 16:16:49 +0100, JM <sunaecoNoSpam@gmail.com> wrote: >>>>>>>

On Wed, 23 Oct 2024 02:05:52 +0100, JM <sunaecoNoSpam@gmail.com> wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

But I suspect that component tolerances and mismatched FETs will >>>>>>>>>> ruin it.

Otherwise it should be easy to get 60dB down on unwanted harmonics >>>>>>>>>> with a better filter.

FWIW I likely won't be here for the next week.

If you actually need a low distortion oscillator look for Viktor >>>>>>>>> Mickevic's designs on diyaudio.   I've attached a schematic. >>>>>>>>>
PK



It seems that I have a problem posting encoded binariesto this group >>>>>>>> with my provider.  Attached is a link instead.

https://1drv.ms/u/c/1af24d72a509cd48/EakMPPRi-pdLgaAKtJ2rrwwBNMGZZsy84MV2QoH1dPcZJQ?e=o59V9a

And that links to an incorrect schematic - the rectified output tap is >>>>>>> connected to the wrong node.  Might be other errors..

Even so, the third harmonic is 78dB below the fundamental. The
simulation runs slowly on my computer, so it may take me a while to get >>>>>> the schematic to where the designer intended it to be.

The choice of op amp is what I'd expect from an audio group - it does >>>>>> seem to be a low distortion part.

I just seem to have wrecked the .raw file from the simulation, so it may >>>>>> be a while before I have more to say.

The file wasn't wrecked, just huge (4.063 GB) and slow to load, despite >>>>> the fact that I've a solid state disk on my computer put in to hold
LTSpice .raw files and load them tolerably quickly.

The circuit uses a half-wave rectifier, then runs the error signal into >>>>> an integrator wrapped around U4. C4 -at 6.8u - is a biggish integrating >>>>> capacitor. R7 - at 120k - has the main purpose of stabilising the
feeback loop controlling the amplitude and also delivers around 6mV of >>>>> 1kHz sinusoidal ripple into the gate of the FET. There about 12mV of >>>>> 1kHz sine wave across the FET channel so this minimises any channel
modulation. Ingenious.

It would have been even move impressive if he'd intended to do that from >>>>> the start, but R5 and R6 make look like it was an afterthought.

My feeling is that an AD734 could do better. Jim Williams did better >>>>> with his FET controlled version, but I've no idea how.

78dB below the fundamental is respectable, but not impressive.

On the bench the THD in the audio band is approx. -140dB (I think - it's years since I looked into the performance of this). Not measured by myself, but there are hundreds of measurements documented on diyaudio and other audio forums. Viktor used

to (possibly still does) sell these oscillators on ebay for a few pounds. I have a couple and borrowed an audio precision analyser to test them - I think the AP measured to about -115dB, and the oscillators performed better than that. That level of
distortion was much better than I required so I didn't attempt the find the true value.

I doubt if LTSpice will give accurate distortion figures with the simulation models I provided, they have not been verified in isolation. Very few opamp macro models provide realistic distortion results.

There may be a more recent schematic available as this circuit has been tweaked over the years.

I think when I simulated this only the 2nd or 3rd harmonic was visable in a 1 second FFT at about -120dB. However, I didn't spend any time on it, just enough to see that it did actually oscillate, and posted it only because it's real performance is

very well documented, and it may be of use to the OP. I could spend some time validating the models and simulating in spectre but real measurments trump simulations.

I still had the .raw file available. I measure the 3rd harmonic at -118dB with a blackman-harris window with a 1s FFT.

Here's the .asc file that I ran

Version 4
SHEET 1 2964 1136
WIRE -896 -176 -960 -176
WIRE -800 -176 -816 -176
WIRE 288 -176 -640 -176
WIRE -960 -160 -960 -176
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WIRE -944 688 -944 672
WIRE -800 688 -800 672
WIRE -800 768 -800 752
FLAG -272 464 vcc
FLAG -272 656 vee
FLAG -320 576 0
FLAG 192 144 vcc
FLAG 192 208 vee
FLAG 112 240 0
FLAG -272 224 0
FLAG -208 128 vcc
FLAG -208 192 vee
FLAG 464 304 0
FLAG -864 0 vcc
FLAG -576 400 vcc
FLAG -576 336 vee
FLAG -864 64 vee
FLAG -800 96 0
FLAG -1136 416 0
FLAG -1200 160 vcc
FLAG -880 352 0
FLAG 464 176 vout
FLAG -800 768 0
FLAG -1248 416 0
FLAG -944 768 0
FLAG -944 576 vee
SYMBOL OpAmps\\opamp2 192 112 R0
WINDOW 3 11 165 Left 2
SYMATTR InstName U1
SYMATTR Value LME49710
SYMBOL voltage -272 448 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -272 560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res 208 32 R90
WINDOW 0 -18 8 VBottom 2
WINDOW 3 15 10 VTop 2
SYMATTR InstName R1
SYMATTR Value 16K
SYMBOL res 64 160 R90
WINDOW 0 -15 12 VBottom 2
WINDOW 3 19 7 VTop 2
SYMATTR InstName R2
SYMATTR Value 8K
SYMBOL res 368 176 R90
WINDOW 0 -16 11 VBottom 2
WINDOW 3 21 4 VTop 2
SYMATTR InstName R3
SYMATTR Value 600
SYMBOL cap 240 -96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap -16 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 20n
SYMBOL OpAmps\\opamp2 -208 96 R0
WINDOW 3 6 168 Left 2
SYMATTR InstName U2
SYMATTR Value LME49710
SYMBOL res -176 32 R90
WINDOW 0 -14 7 VBottom 2
WINDOW 3 21 6 VTop 2
SYMATTR InstName R4
SYMATTR Value 10.02K
SYMBOL cap -160 -96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL njf -528 192 R270
SYMATTR InstName J1
SYMATTR Value MMBF4391
SYMBOL res -368 208 R90
WINDOW 0 -15 10 VBottom 2
WINDOW 3 19 7 VTop 2
SYMATTR InstName R5
SYMATTR Value 2.2K
SYMBOL res -464 272 R180
WINDOW 0 36 33 Left 2
WINDOW 3 24 -6 Left 2
SYMATTR InstName R6
SYMATTR Value 2.2K
SYMBOL res 464 240 R0
SYMATTR InstName R8
SYMATTR Value 600
SYMBOL res -640 80 R0
SYMATTR InstName R9
SYMATTR Value 10K
SYMBOL res -576 480 R90
WINDOW 0 -16 14 VBottom 2
WINDOW 3 25 7 VTop 2
SYMATTR InstName R7
SYMATTR Value 120K
SYMBOL cap -480 464 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 6.8µ
SYMBOL cap -528 560 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 1µ
SYMBOL diode -528 656 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res -720 16 R90
WINDOW 0 -20 14 VBottom 2
WINDOW 3 21 9 VTop 2
SYMATTR InstName R10
SYMATTR Value 15K
SYMBOL res -848 -176 R90
WINDOW 0 -15 14 VBottom 2
WINDOW 3 -46 -41 VTop 2
SYMATTR InstName R11
SYMATTR Value 15K
SYMBOL diode -944 -96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL diode -832 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL res -1056 304 R90
WINDOW 0 -13 7 VBottom 2
WINDOW 3 14 0 VTop 2
SYMATTR InstName R12
SYMATTR Value 820
SYMBOL diode -1152 256 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res -1248 208 R0
SYMATTR InstName R13
SYMATTR Value 390K
SYMBOL cap -1152 320 R0
SYMATTR InstName C6
SYMATTR Value 1µ
SYMBOL res -800 224 R0
SYMATTR InstName R14
SYMATTR Value 8.2K
SYMBOL cap -896 288 R0
SYMATTR InstName C7
SYMATTR Value 1µ
SYMBOL res -800 336 R0
SYMATTR InstName R15
SYMATTR Value 120K
SYMBOL res -704 432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R17
SYMATTR Value 680
SYMBOL res -720 672 R90
WINDOW 0 -20 9 VBottom 2
WINDOW 3 19 11 VTop 2
SYMATTR InstName R16
SYMATTR Value 1Meg
SYMBOL cap -784 688 M0
SYMATTR InstName C8
SYMATTR Value 1µ
SYMBOL res -864 672 R90
WINDOW 0 -13 10 VBottom 2
WINDOW 3 18 17 VTop 2
SYMATTR InstName R18
SYMATTR Value 56K
SYMBOL res -1248 352 R0
SYMATTR InstName R21
SYMATTR Value 180K
SYMBOL pnp -1024 352 M180
WINDOW 0 18 -8 Left 2
WINDOW 3 28 48 Left 2
SYMATTR InstName Q1
SYMATTR Value BC857C
SYMBOL res -944 720 M0
SYMATTR InstName R19
SYMATTR Value 6.2K
SYMBOL res -944 608 M0
SYMATTR InstName R20
SYMATTR Value 5k
SYMBOL OpAmps\\opamp2 -576 432 M180
SYMATTR InstName U4
SYMATTR Value TL072
SYMBOL OpAmps\\opamp2 -864 -32 M0
SYMATTR InstName U5
SYMATTR Value TL072
TEXT -1128 864 Left 2 !.MODEL MMBF4391 NJF VTO=-4.6 BETA=0.02779
LAMBDA=0.00595 RD=1 RS=1 IS=1e-14 CGD=14p CGS=10.5p PB=1 B=1 KF=1e-18
AF=1 FC=0.5 mfg=Motorola
TEXT -1248 600 Right 2 !.tran 0 5 4.9 1e-6 startup
TEXT -1464 656 Left 2 !.lib LME49710.lib
TEXT -1464 696 Left 2 !.lib TL072.lib

I had to move all the resistors to get them where they were clearly
intended to be, and if Edward Rawde's experience is any guide you will
have to move them back. I haven't included the two .lib files from your
zipped folder. Why you needed to include a library for the TL072 escapes
me - it's a jelly-bean part.

Maybe one of the connections got messed up in the process - you did say
that one of them was misplaced.

I am running LTSpice 17 (XVII) and it was updated recently.

My FFT on V(out) had the third harmonic -78dB below the fundamental, not
-118dB.

Checking again over the last one 1 second and the last 10 seconds, it's
only -46dB, which is very odd.

Viktor Mickevic's design does look pretty good, so I suspect that
LTSpice 17 might not be performing as well as it should.

Yes, the resistors have an offset - one of us must have a non standard symbol.

My resistor symbol is the normal rectangular block. I don't recall
doing anything to select it,

The Q1 emitter/r14 node should connect to the D3 cathode (which is the schematic error I mentioned) so that may account for the different result (I can't see any other changes that needs to be made). I used ltspice 17.1.15 - as is usual with

oscillators the integration method should be trapezoidal rather than gear.

Moving the connection did make a big difference. I'm now seeing both odd
and even harmonics, but 80dB below the fundamental. I collected data
from 1 second rather than 4sec, and the amplitude takes most of the
extra time to settle to a stable value. I'll have more of a dig tomorrow
- it's 1:20am here, and I should be in bed.

I'm using LTSpice XVII (x64) (17.0.37.0) running under Windows 7.

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 26/10/2024 3:41 am, JM wrote:

On Sat, 26 Oct 2024 01:27:27 +1100, Bill Sloman <bill.sloman@ieee.org> wrote:

On 26/10/2024 12:15 am, JM wrote:

On Fri, 25 Oct 2024 23:03:32 +1100, Bill Sloman <bill.sloman@ieee.org> wrote:

On 25/10/2024 7:45 pm, JM wrote:

On Fri, 25 Oct 2024 09:25:31 +0100, JM <sunaecoNoSpam@gmail.com> wrote: >>>>>

On Fri, 25 Oct 2024 18:16:26 +1100, Bill Sloman <bill.sloman@ieee.org> wrote:

On 25/10/2024 3:25 pm, Bill Sloman wrote:

On 25/10/2024 4:48 am, JM wrote:

On Thu, 24 Oct 2024 16:16:49 +0100, JM <sunaecoNoSpam@gmail.com> wrote:

On Wed, 23 Oct 2024 02:05:52 +0100, JM <sunaecoNoSpam@gmail.com> wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

<snip>

Maybe one of the connections got messed up in the process - you did say >>>> that one of them was misplaced.

I am running LTSpice 17 (XVII) and it was updated recently.

My FFT on V(out) had the third harmonic -78dB below the fundamental, not >>>> -118dB.

Checking again over the last one 1 second and the last 10 seconds, it's >>>> only -46dB, which is very odd.

Viktor Mickevic's design does look pretty good, so I suspect that
LTSpice 17 might not be performing as well as it should.

Yes, the resistors have an offset - one of us must have a non standard symbol.

My resistor symbol is the normal rectangular block. I don't recall
doing anything to select it,

The Q1 emitter/r14 node should connect to the D3 cathode (which is the schematic error I mentioned) so that may account for the different result (I can't see any other changes that needs to be made). I used ltspice 17.1.15 - as is usual with

oscillators the integration method should be trapezoidal rather than gear.

Moving the connection did make a big difference. I'm now seeing both odd
and even harmonics, but 80dB below the fundamental. I collected data
from 1 second rather than 4sec, and the amplitude takes most of the
extra time to settle to a stable value. I'll have more of a dig tomorrow
- it's 1:20am here, and I should be in bed.

I'm using LTSpice XVII (x64) (17.0.37.0) running under Windows 7.

You are probably using modified trapezoidal (which is the default) rather than trapezpoidal. To get anything vaguely sensible out of ltspice you have to turn off all of Engelhardt's "improvements". Better yet use any other spice.

I was. Switching to trapezoidal made another big difference.

I'm still seeing both odd an even harmonics, but they are about 97dB
below the fundamental.

Mike Engelhardt wasn't trying to make a more perfect Spice - he was
making a version of Spice that Linear Technology could distribute free
as an advertising gimmick. It was a pretty a good version of Spice
despite this, and made a good deal of difference to what we could share
on sci.electronics.design.

It turned out that Mike and I had been working on opposite sides of the electron-beam tester conflict at the end of the 1980's. Mike's side won
- my machine was more ambitious, but quite a bit more expensive, and
while we got it working, it wasn't worth spending the money to put it
into even low-volume production.

http://sophia-elektronica.com/At_Cambridge.html

puts my project in context

http://sophia-elektronica.com/The_early_history_of_voltage_contrast.html

talks about voltage contrast, and mentions Mike Engelhardt.

http://sophia-elektronica.com/The_first_stage.html

is more specific.

Check the origin in your res.asy and EuropeanResistor.asy (if by box type you mean the IEC standard). It should be one grid diagonal from pin A. (Press control while right clicking on a placed resistor to locate and open the symbol). If the origin

is not correct resistors on any schematic sent to (or received from) you will be drawn with an offset.

I'll have a look sometime soon.

The point you made about the LTSpice op amp models echoes what the late
Jim Thompson used to say here. The op amp models that get distributed
aren't transistor level models but behavioral models, that do more or
less the right thing. depending on how carefully and expertly they had
been written. Jim Thompson touted himself - fairly convincingly - as an
expert on writing them.

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 26/10/2024 8:40 pm, JM wrote:

On Sat, 26 Oct 2024 14:21:32 +1100, Bill Sloman <bill.sloman@ieee.org> wrote:

On 26/10/2024 3:41 am, JM wrote:

On Sat, 26 Oct 2024 01:27:27 +1100, Bill Sloman <bill.sloman@ieee.org> wrote:

On 26/10/2024 12:15 am, JM wrote:

On Fri, 25 Oct 2024 23:03:32 +1100, Bill Sloman <bill.sloman@ieee.org> wrote:

On 25/10/2024 7:45 pm, JM wrote:

On Fri, 25 Oct 2024 09:25:31 +0100, JM <sunaecoNoSpam@gmail.com> wrote: >>>>>>>

On Fri, 25 Oct 2024 18:16:26 +1100, Bill Sloman <bill.sloman@ieee.org> wrote:

On 25/10/2024 3:25 pm, Bill Sloman wrote:

On 25/10/2024 4:48 am, JM wrote:

On Thu, 24 Oct 2024 16:16:49 +0100, JM <sunaecoNoSpam@gmail.com> wrote:

On Wed, 23 Oct 2024 02:05:52 +0100, JM <sunaecoNoSpam@gmail.com> wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

<snip>

Maybe one of the connections got messed up in the process - you did say >>>>>> that one of them was misplaced.

I am running LTSpice 17 (XVII) and it was updated recently.

My FFT on V(out) had the third harmonic -78dB below the fundamental, not >>>>>> -118dB.

Checking again over the last one 1 second and the last 10 seconds, it's >>>>>> only -46dB, which is very odd.

Viktor Mickevic's design does look pretty good, so I suspect that
LTSpice 17 might not be performing as well as it should.

Yes, the resistors have an offset - one of us must have a non standard symbol.

My resistor symbol is the normal rectangular block. I don't recall
doing anything to select it,

The Q1 emitter/r14 node should connect to the D3 cathode (which is the schematic error I mentioned) so that may account for the different result (I can't see any other changes that needs to be made). I used ltspice 17.1.15 - as is usual with

oscillators the integration method should be trapezoidal rather than gear.

Moving the connection did make a big difference. I'm now seeing both odd >>>> and even harmonics, but 80dB below the fundamental. I collected data
from 1 second rather than 4sec, and the amplitude takes most of the
extra time to settle to a stable value. I'll have more of a dig tomorrow >>>> - it's 1:20am here, and I should be in bed.

I'm using LTSpice XVII (x64) (17.0.37.0) running under Windows 7.

You are probably using modified trapezoidal (which is the default) rather than trapezpoidal. To get anything vaguely sensible out of ltspice you have to turn off all of Engelhardt's "improvements". Better yet use any other spice.

I was. Switching to trapezoidal made another big difference.

I'm still seeing both odd an even harmonics, but they are about 97dB
below the fundamental.

Mike Engelhardt wasn't trying to make a more perfect Spice - he was
making a version of Spice that Linear Technology could distribute free
as an advertising gimmick. It was a pretty a good version of Spice
despite this, and made a good deal of difference to what we could share
on sci.electronics.design.

It turned out that Mike and I had been working on opposite sides of the
electron-beam tester conflict at the end of the 1980's. Mike's side won
- my machine was more ambitious, but quite a bit more expensive, and
while we got it working, it wasn't worth spending the money to put it
into even low-volume production.

http://sophia-elektronica.com/At_Cambridge.html

puts my project in context

http://sophia-elektronica.com/The_early_history_of_voltage_contrast.html

talks about voltage contrast, and mentions Mike Engelhardt.

http://sophia-elektronica.com/The_first_stage.html

is more specific.

Check the origin in your res.asy and EuropeanResistor.asy (if by box type you mean the IEC standard). It should be one grid diagonal from pin A. (Press control while right clicking on a placed resistor to locate and open the symbol). If the origin

is not correct resistors on any schematic sent to (or received from) you will be drawn with an offset.

I'll have a look sometime soon.

The point you made about the LTSpice op amp models echoes what the late
Jim Thompson used to say here. The op amp models that get distributed
aren't transistor level models but behavioral models, that do more or
less the right thing. depending on how carefully and expertly they had
been written. Jim Thompson touted himself - fairly convincingly - as an
expert on writing them.

Are you doing an FFT only over an interval where the output has settled down?

I changed the simulation command to start it saving data at 0.1 sec and
to simulate for 10 seconds. The settling behavior is interesting. It
hasn't quite settled at 5 sec, and I ran the FFT from 6sec to 10 sec.

Since you have an interest in oscillators I'll email you a version of the circuit next week (if I remember!) where all harmonics in the audio band are below -150dB wrt the fundamental.

I look forward to it.

I won't post to the group since the design is proprietary.

That makes sense. This is a public forum.

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

On 26/10/2024 10:31 pm, Bill Sloman wrote:

On 26/10/2024 8:40 pm, JM wrote:

On Sat, 26 Oct 2024 14:21:32 +1100, Bill Sloman <bill.sloman@ieee.org>
wrote:

On 26/10/2024 3:41 am, JM wrote:

On Sat, 26 Oct 2024 01:27:27 +1100, Bill Sloman
<bill.sloman@ieee.org> wrote:

On 26/10/2024 12:15 am, JM wrote:

On Fri, 25 Oct 2024 23:03:32 +1100, Bill Sloman
<bill.sloman@ieee.org> wrote:

On 25/10/2024 7:45 pm, JM wrote:

On Fri, 25 Oct 2024 09:25:31 +0100, JM <sunaecoNoSpam@gmail.com> >>>>>>>> wrote:

On Fri, 25 Oct 2024 18:16:26 +1100, Bill Sloman
<bill.sloman@ieee.org> wrote:

On 25/10/2024 3:25 pm, Bill Sloman wrote:

On 25/10/2024 4:48 am, JM wrote:

On Thu, 24 Oct 2024 16:16:49 +0100, JM
<sunaecoNoSpam@gmail.com> wrote:

On Wed, 23 Oct 2024 02:05:52 +0100, JM
<sunaecoNoSpam@gmail.com> wrote:

On Tue, 22 Oct 2024 01:10:41 -0400, "Edward Rawde" >>>>>>>>>>>>>> <invalid@invalid.invalid> wrote:

<snip>

Maybe one of the connections got messed up in the process - you
did say
that one of them was misplaced.

I am running LTSpice 17 (XVII) and it was updated recently.

My FFT on V(out) had the third harmonic -78dB below the
fundamental, not
-118dB.

Checking again over the last one 1 second and the last 10
seconds, it's
only -46dB, which is very odd.

Viktor Mickevic's design does look pretty good, so I suspect that >>>>>>> LTSpice 17 might not be performing as well as it should.

Yes, the resistors have an offset - one of us must have a non
standard symbol.

My resistor symbol  is the normal rectangular block. I don't recall >>>>> doing anything to select it,

The Q1 emitter/r14 node should connect to the D3 cathode (which is >>>>>> the schematic error I mentioned) so that may account for the
different result (I can't see any other changes that needs to be
made). I used ltspice 17.1.15 - as is usual with oscillators the
integration method should be trapezoidal rather than gear.

Moving the connection did make a big difference. I'm now seeing
both odd
and even harmonics, but 80dB below the fundamental. I collected data
from 1 second rather than 4sec, and the amplitude takes most of the
extra time to settle to a stable value. I'll have more of a dig
tomorrow
- it's 1:20am here, and I should be in bed.

I'm using LTSpice XVII (x64) (17.0.37.0) running under Windows 7.

You are probably using modified trapezoidal (which is the default)
rather than trapezpoidal.  To get anything vaguely sensible out of
ltspice you have to turn off all of Engelhardt's "improvements".
Better yet use any other spice.

I was. Switching to trapezoidal made another big difference.

I'm still seeing both odd an even harmonics, but they are about 97dB
below the fundamental.

Mike Engelhardt wasn't trying to make a more perfect Spice - he was
making a version of Spice that Linear Technology could distribute free
as an advertising gimmick. It was a pretty a good version of Spice
despite this, and made a good deal of difference to what we could share
on sci.electronics.design.

It turned out that Mike and I had been working on opposite sides of the
electron-beam tester conflict at the end of the 1980's. Mike's side won
- my machine was more ambitious, but quite a bit more expensive, and
while we got it working, it wasn't worth spending the money to put it
into  even low-volume production.

http://sophia-elektronica.com/At_Cambridge.html

puts my project in context

http://sophia-elektronica.com/The_early_history_of_voltage_contrast.html >>>
talks about voltage contrast, and mentions Mike Engelhardt.

http://sophia-elektronica.com/The_first_stage.html

is more specific.

Check the origin in your res.asy and EuropeanResistor.asy (if by box
type you mean the IEC standard).  It should be one grid diagonal
from pin A.  (Press control while right clicking on a placed
resistor to locate and open the symbol).  If the origin is not
correct resistors on any schematic sent to (or received from) you
will be drawn with an offset.

I'll have a look sometime soon.

The point you made about the LTSpice op amp models echoes what the late
Jim Thompson used to say here. The op amp models that get distributed
aren't transistor level models but behavioral models, that do more or
less the right thing. depending on how carefully and expertly they had
been written. Jim Thompson touted himself - fairly convincingly - as an
expert on writing them.

Are you doing an FFT only over an interval where the output has
settled down?

I changed the simulation command to start it saving data at 0.1 sec and
to simulate for 10 seconds. The settling behavior is interesting. It
hasn't quite settled at 5 sec, and I ran the FFT from 6sec to 10 sec.

Since you have an interest in oscillators  I'll email you a version of
the circuit next week (if I remember!) where all harmonics in the
audio band are below -150dB wrt the fundamental.

I look forward to it.

I won't post to the group since the design is proprietary.

That makes sense. This is a public forum.

I've got the circuit and it was impressive - the LTSpice simulation gave
a third harmonic that was 140dB below the fundamental, even though the
circuit had been modified into a form that would simulate in a finite time.

I'm not all that happy with the amplitude control feedback loop - it
clearly works but seems to have quite a few more components than it
ought to need - but once you have a circuit that works that well it's
tempting to stick with it.

--
Bill Sloman, Sydney

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

john larkin <jl@glen--canyon.com> wrote:

On Tue, 22 Oct 2024 10:12:23 -0400, "Edward Rawde"
<invalid@invalid.invalid> wrote:

"Bill Sloman" <bill.sloman@ieee.org> wrote in message news:vf7slm$1e357$1@dont-email.me...

On 22/10/2024 4:10 pm, Edward Rawde wrote:

But I suspect that component tolerances and mismatched FETs will ruin it. >>>>
Otherwise it should be easy to get 60dB down on unwanted harmonics with a better filter.

FWIW I likely won't be here for the next week.

<snip>

My message was that the current sucked out of U2 through D1 and D2 was a narrow spike, peaking at 0.3mA and repeating at 1kHz,
which distorted the voltage at the output of U2.

Your revised circuit persists with this mistake, and the filter you've added around U1 doesn't do enough to compensate.

That's what I thought you'd say, because there are now two spikes, but it does seem to reduce distortion.
So I'd leave it in any experimental prototype and take the decision to remove it if real testing shows it's not sufficiently
beneficial.
The filter can be redesigned when a real circuit is tested. I didn't have time to do a more elaborate active filter.

If you do build an ultra-low-distortion oscillator, how would you
measure the distortion?

I was thinking about using passive filter with zero at the fundamental frequency of the oscillator. Fundamental would go down, distortion
would be changed, but not too much and in predictable way. Then
one could measure distortion of signal that got trough the filter.
It would be weak signal but since it would have much higher distortion
it would be easier to measure. I assume that passive filter is
sufficiently linear and that frequency is stable enough.

--
Waldek Hebisch

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)