• d-flop one-shot

    From john larkin @21:1/5 to All on Wed Jul 10 09:16:36 2024
    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From bitrex@21:1/5 to john larkin on Wed Jul 10 15:56:51 2024
    On 7/10/2024 12:16 PM, john larkin wrote:
    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    I get better hits using the term "monostable":

    <https://www.n5dux.com/ham/files/pdf/Working%20With%20Monostable%20Multivibrators.pdf>

    Fig 9 is about as simple as it gets. I don't understand why the extra
    flop and the low pass and stuff after the button in the link you posted,
    it's like they never heard of a passive differentiator before.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From john larkin @21:1/5 to invalid@invalid.invalid on Wed Jul 10 14:11:29 2024
    On Wed, 10 Jul 2024 16:25:51 -0400, "Edward Rawde"
    <invalid@invalid.invalid> wrote:

    "john larkin" <jlarkin_highland_tech> wrote in message news:ject8j1199btt6q6k5a7o57q01hqsvcj20@4ax.com...
    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    One way to shorten a pulse derived from a clock signal is to clear the d-type with the clock signal.
    Suppose you have a 1 clock cycle pulse produced by a d-type.
    Connect it to d on another d-type, connect the clock as usual but also connect the clock to /clear
    A 74HC74 d-type will clock and Q will go high but then it will be cleared by the clock going low and so Q will go low half a clock
    later.

    You can debate whether or not this violates any setup/hold or other timing requirements and you can always delay the /reset signal
    with a gate or two if needed.

    I've seen this work fine in an experimental design using 74HC74 with clk and /reset connected together.


    That assumes that the going-away prop delay of the reset path is
    faster than the clock path. Might be for some flops.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Edward Rawde@21:1/5 to All on Wed Jul 10 16:25:51 2024
    "john larkin" <jlarkin_highland_tech> wrote in message news:ject8j1199btt6q6k5a7o57q01hqsvcj20@4ax.com...
    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    One way to shorten a pulse derived from a clock signal is to clear the d-type with the clock signal.
    Suppose you have a 1 clock cycle pulse produced by a d-type.
    Connect it to d on another d-type, connect the clock as usual but also connect the clock to /clear
    A 74HC74 d-type will clock and Q will go high but then it will be cleared by the clock going low and so Q will go low half a clock
    later.

    You can debate whether or not this violates any setup/hold or other timing requirements and you can always delay the /reset signal
    with a gate or two if needed.

    I've seen this work fine in an experimental design using 74HC74 with clk and /reset connected together.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From john larkin @21:1/5 to bitrex on Wed Jul 10 14:07:55 2024
    On Wed, 10 Jul 2024 15:56:51 -0400, bitrex <user@example.net> wrote:

    On 7/10/2024 12:16 PM, john larkin wrote:
    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    I get better hits using the term "monostable":

    <https://www.n5dux.com/ham/files/pdf/Working%20With%20Monostable%20Multivibrators.pdf>

    Fig 9 is about as simple as it gets. I don't understand why the extra
    flop and the low pass and stuff after the button in the link you posted,
    it's like they never heard of a passive differentiator before.


    Yikes, 36 years old. CD4000B logic.

    I like d-flop one-shots because they are fast, truly edge-triggered,
    and can be gated with the D input.

    But RC feedback into a reset input is risky at best. Some flops simply
    won't work that way... they hang up.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Edward Rawde@21:1/5 to All on Wed Jul 10 17:31:19 2024
    "john larkin" <jlarkin_highland_tech> wrote in message news:q3ut8jlunltas06rdsu022obiran2na117@4ax.com...
    On Wed, 10 Jul 2024 16:25:51 -0400, "Edward Rawde"
    <invalid@invalid.invalid> wrote:

    "john larkin" <jlarkin_highland_tech> wrote in message news:ject8j1199btt6q6k5a7o57q01hqsvcj20@4ax.com...
    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    One way to shorten a pulse derived from a clock signal is to clear the d-type with the clock signal.
    Suppose you have a 1 clock cycle pulse produced by a d-type.
    Connect it to d on another d-type, connect the clock as usual but also connect the clock to /clear
    A 74HC74 d-type will clock and Q will go high but then it will be cleared by the clock going low and so Q will go low half a clock
    later.

    You can debate whether or not this violates any setup/hold or other timing requirements and you can always delay the /reset signal
    with a gate or two if needed.

    I've seen this work fine in an experimental design using 74HC74 with clk and /reset connected together.


    That assumes that the going-away prop delay of the reset path is
    faster than the clock path. Might be for some flops.


    Yes it does, which is one reason I've never used it in a production design, but I have seen it work fine in an experimental design.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Cursitor Doom@21:1/5 to john larkin on Wed Jul 10 22:50:54 2024
    On Wed, 10 Jul 2024 14:07:55 -0700, john larkin wrote:

    On Wed, 10 Jul 2024 15:56:51 -0400, bitrex <user@example.net> wrote:

    On 7/10/2024 12:16 PM, john larkin wrote:
    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    I get better hits using the term "monostable":

    <https://www.n5dux.com/ham/files/pdf/ Working%20With%20Monostable%20Multivibrators.pdf>

    Fig 9 is about as simple as it gets. I don't understand why the extra
    flop and the low pass and stuff after the button in the link you posted, >>it's like they never heard of a passive differentiator before.


    Yikes, 36 years old. CD4000B logic.

    I like d-flop one-shots because they are fast, truly edge-triggered, and
    can be gated with the D input.

    But RC feedback into a reset input is risky at best. Some flops simply
    won't work that way... they hang up.

    Is this in furtherence of your TDR experimentation? I can't think of
    anything else a one-shot is useful for.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From john larkin @21:1/5 to cd999666@notformail.com on Wed Jul 10 17:16:56 2024
    On Wed, 10 Jul 2024 22:50:54 -0000 (UTC), Cursitor Doom <cd999666@notformail.com> wrote:

    On Wed, 10 Jul 2024 14:07:55 -0700, john larkin wrote:

    On Wed, 10 Jul 2024 15:56:51 -0400, bitrex <user@example.net> wrote:

    On 7/10/2024 12:16 PM, john larkin wrote:
    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    I get better hits using the term "monostable":

    <https://www.n5dux.com/ham/files/pdf/ >Working%20With%20Monostable%20Multivibrators.pdf>

    Fig 9 is about as simple as it gets. I don't understand why the extra >>>flop and the low pass and stuff after the button in the link you posted, >>>it's like they never heard of a passive differentiator before.


    Yikes, 36 years old. CD4000B logic.

    I like d-flop one-shots because they are fast, truly edge-triggered, and
    can be gated with the D input.

    But RC feedback into a reset input is risky at best. Some flops simply
    won't work that way... they hang up.

    Is this in furtherence of your TDR experimentation? I can't think of
    anything else a one-shot is useful for.

    Phil is doing a TDR project. I'm mostly doing slow precision stuff
    lately.

    I am planning a few new products, and one is a sort of precision pulse generator. I was thinking to have the "HIT" flop, the first trigger
    recognizer, be the one-shot. But it's easier to put that inside an
    FPGA. The problem with FPGAs is time jitter, from all the routing
    crosstalk and clock feedthru and ground bounce and power supply
    sensitivity. Maybe they can be managed.

    I tested one Xilinx chip for pin-to-pin delay sensitivity vs core
    supply voltage. It measured 70 microvolts per picosecond.

    Some people think one-shots are evil, but I like them.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jan Panteltje@21:1/5 to All on Thu Jul 11 05:32:42 2024
    On a sunny day (Wed, 10 Jul 2024 09:16:36 -0700) it happened john larkin <jlarkin_highland_tech> wrote in <ject8j1199btt6q6k5a7o57q01hqsvcj20@4ax.com>:

    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm

    Old as the world,
    74121 is simpler?

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Bill Sloman@21:1/5 to john larkin on Thu Jul 11 16:50:16 2024
    On 11/07/2024 10:16 am, john larkin wrote:
    On Wed, 10 Jul 2024 22:50:54 -0000 (UTC), Cursitor Doom <cd999666@notformail.com> wrote:

    On Wed, 10 Jul 2024 14:07:55 -0700, john larkin wrote:

    On Wed, 10 Jul 2024 15:56:51 -0400, bitrex <user@example.net> wrote:

    On 7/10/2024 12:16 PM, john larkin wrote:
    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    I get better hits using the term "monostable":

    <https://www.n5dux.com/ham/files/pdf/
    Working%20With%20Monostable%20Multivibrators.pdf>

    Fig 9 is about as simple as it gets. I don't understand why the extra
    flop and the low pass and stuff after the button in the link you posted, >>>> it's like they never heard of a passive differentiator before.


    Yikes, 36 years old. CD4000B logic.

    I like d-flop one-shots because they are fast, truly edge-triggered, and >>> can be gated with the D input.

    But RC feedback into a reset input is risky at best. Some flops simply
    won't work that way... they hang up.

    Is this in furtherence of your TDR experimentation? I can't think of
    anything else a one-shot is useful for.

    Phil is doing a TDR project. I'm mostly doing slow precision stuff
    lately.

    I am planning a few new products, and one is a sort of precision pulse generator. I was thinking to have the "HIT" flop, the first trigger recognizer, be the one-shot. But it's easier to put that inside an
    FPGA. The problem with FPGAs is time jitter, from all the routing
    crosstalk and clock feedthru and ground bounce and power supply
    sensitivity. Maybe they can be managed.

    Probably not. Signal routing is a problem that's hard to manage if you
    don't have lot of control over where the signal goes, and can't add
    shielding tracks alongside sensitive signal paths.

    I tested one Xilinx chip for pin-to-pin delay sensitivity vs core
    supply voltage. It measured 70 microvolts per picosecond.

    I had one famous success when I was in the Netherlands, when I added an
    ECL front end to a basically TTL delay generating device. Changing Vcc
    levels shifted the output edge by an appreciable fraction of a
    nanosecond in the original TTL-only system. Shifting the edge-generation
    into ECL and taking the TTL output edge from an ECL-to-TTL converter
    reduced the timing jitter to undetectable levels.

    Some people think one-shots are evil, but I like them.

    They certainly can be, but they can equally be very useful.

    You'd be well advised to look carefully at the emitter coupled
    monostable, and work out exactly what it does when it starts generating
    it's output pulse.

    This isn't trivial

    https://ieeexplore.ieee.org/document/1643426

    but it is worth doing.

    If the two transistors in the simple emitter-coupled monostable are
    BFR92A parts it can produce a one nsec wide output pulse. It can also
    oscillate if you don't manage the base driving impedance carefully.

    Faster parts could do better, but can be even harder to keep stable.

    --
    Bill Sloman, Sydney




    --
    This email has been checked for viruses by Norton antivirus software. www.norton.com

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From legg@21:1/5 to All on Thu Jul 11 09:45:17 2024
    On Wed, 10 Jul 2024 09:16:36 -0700, john larkin
    <jlarkin_highland_tech> wrote:

    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm

    So don't google that.

    Any electronics that is controlled/triggered by a manual press
    switch needs to recognize and address the limitations of that
    hardware.for predictable operation.

    A suirable topic for electronics 101.

    RL

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From john larkin @21:1/5 to All on Thu Jul 11 07:50:28 2024
    On Thu, 11 Jul 2024 05:32:42 GMT, Jan Panteltje <alien@comet.invalid>
    wrote:

    On a sunny day (Wed, 10 Jul 2024 09:16:36 -0700) it happened john larkin ><jlarkin_highland_tech> wrote in <ject8j1199btt6q6k5a7o57q01hqsvcj20@4ax.com>:

    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm

    Old as the world,
    74121 is simpler?

    SN74LVC1G123DCU is a nice little part. Good for flashing LEDs and
    such.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From john larkin @21:1/5 to legg on Thu Jul 11 07:48:53 2024
    On Thu, 11 Jul 2024 09:45:17 -0400, legg <legg@nospam.magma.ca> wrote:

    On Wed, 10 Jul 2024 09:16:36 -0700, john larkin
    <jlarkin_highland_tech> wrote:

    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm

    So don't google that.


    I just invented a search engine that delivers no results. It will
    improve the world.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jan Panteltje@21:1/5 to All on Thu Jul 11 15:27:12 2024
    On a sunny day (Thu, 11 Jul 2024 07:50:28 -0700) it happened john larkin <jlarkin_highland_tech> wrote in <u7sv8jhjfm9qcbkf5gt36f0pr7ao2nimvp@4ax.com>:

    On Thu, 11 Jul 2024 05:32:42 GMT, Jan Panteltje <alien@comet.invalid>
    wrote:

    On a sunny day (Wed, 10 Jul 2024 09:16:36 -0700) it happened john larkin >><jlarkin_highland_tech> wrote in <ject8j1199btt6q6k5a7o57q01hqsvcj20@4ax.com>:

    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm

    Old as the world,
    74121 is simpler?

    SN74LVC1G123DCU is a nice little part. Good for flashing LEDs and
    such.



    I used 2 121 in series with 2 current sources into the caps
    as video FM modulaor to replace the old Ampex modulator that used tubes.
    few MHz sweep (from 6 MHz upwards IIRC).
    Demoded it at work (studio)...
    Worked very well.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From bitrex@21:1/5 to john larkin on Thu Jul 11 12:01:02 2024
    On 7/10/2024 8:16 PM, john larkin wrote:
    On Wed, 10 Jul 2024 22:50:54 -0000 (UTC), Cursitor Doom <cd999666@notformail.com> wrote:

    On Wed, 10 Jul 2024 14:07:55 -0700, john larkin wrote:

    On Wed, 10 Jul 2024 15:56:51 -0400, bitrex <user@example.net> wrote:

    On 7/10/2024 12:16 PM, john larkin wrote:
    If you google use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    I get better hits using the term "monostable":

    <https://www.n5dux.com/ham/files/pdf/
    Working%20With%20Monostable%20Multivibrators.pdf>

    Fig 9 is about as simple as it gets. I don't understand why the extra
    flop and the low pass and stuff after the button in the link you posted, >>>> it's like they never heard of a passive differentiator before.


    Yikes, 36 years old. CD4000B logic.

    I like d-flop one-shots because they are fast, truly edge-triggered, and >>> can be gated with the D input.

    But RC feedback into a reset input is risky at best. Some flops simply
    won't work that way... they hang up.

    Is this in furtherence of your TDR experimentation? I can't think of
    anything else a one-shot is useful for.

    Phil is doing a TDR project. I'm mostly doing slow precision stuff
    lately.

    I am planning a few new products, and one is a sort of precision pulse generator. I was thinking to have the "HIT" flop, the first trigger recognizer, be the one-shot. But it's easier to put that inside an
    FPGA. The problem with FPGAs is time jitter, from all the routing
    crosstalk and clock feedthru and ground bounce and power supply
    sensitivity. Maybe they can be managed.

    I tested one Xilinx chip for pin-to-pin delay sensitivity vs core
    supply voltage. It measured 70 microvolts per picosecond.

    Some people think one-shots are evil, but I like them.

    The supply to delay variation in the Greenpak SPLD 16 bit counter
    configured as a one-shot is around 10, in simulation anyway..

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From bitrex@21:1/5 to bitrex on Thu Jul 11 12:23:25 2024
    On 7/11/2024 12:01 PM, bitrex wrote:
    On 7/10/2024 8:16 PM, john larkin wrote:
    On Wed, 10 Jul 2024 22:50:54 -0000 (UTC), Cursitor Doom
    <cd999666@notformail.com> wrote:

    On Wed, 10 Jul 2024 14:07:55 -0700, john larkin wrote:

    On Wed, 10 Jul 2024 15:56:51 -0400, bitrex <user@example.net> wrote:

    On 7/10/2024 12:16 PM, john larkin wrote:
    If you google   use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this
    image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    I get better hits using the term "monostable":

    <https://www.n5dux.com/ham/files/pdf/
    Working%20With%20Monostable%20Multivibrators.pdf>

    Fig 9 is about as simple as it gets. I don't understand why the extra >>>>> flop and the low pass and stuff after the button in the link you
    posted,
    it's like they never heard of a passive differentiator before.


    Yikes, 36 years old. CD4000B logic.

    I like d-flop one-shots because they are fast, truly edge-triggered,
    and
    can be gated with the D input.

    But RC feedback into a reset input is risky at best. Some flops simply >>>> won't work that way... they hang up.

    Is this in furtherence of your TDR experimentation? I can't think of
    anything else a one-shot is useful for.

    Phil is doing a TDR project. I'm mostly doing slow precision stuff
    lately.

    I am planning a few new products, and one is a sort of precision pulse
    generator. I was thinking to have the "HIT" flop, the first trigger
    recognizer, be the one-shot. But it's easier to put that inside an
    FPGA. The problem with FPGAs is time jitter, from all the routing
    crosstalk and clock feedthru and ground bounce and power supply
    sensitivity. Maybe they can be managed.

    I tested one Xilinx chip for pin-to-pin delay sensitivity vs core
    supply voltage. It  measured 70 microvolts per picosecond.

    Some people think one-shots are evil, but I like them.

    The supply to delay variation in the Greenpak SPLD 16 bit counter
    configured as a one-shot is around 10, in simulation anyway..


    I'll try to measure it this weekend, I'm interested to see. What general
    length of one-shot are we talking?

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From john larkin @21:1/5 to bitrex on Thu Jul 11 14:21:20 2024
    On Thu, 11 Jul 2024 12:23:25 -0400, bitrex <user@example.net> wrote:

    On 7/11/2024 12:01 PM, bitrex wrote:
    On 7/10/2024 8:16 PM, john larkin wrote:
    On Wed, 10 Jul 2024 22:50:54 -0000 (UTC), Cursitor Doom
    <cd999666@notformail.com> wrote:

    On Wed, 10 Jul 2024 14:07:55 -0700, john larkin wrote:

    On Wed, 10 Jul 2024 15:56:51 -0400, bitrex <user@example.net> wrote: >>>>>
    On 7/10/2024 12:16 PM, john larkin wrote:
    If you google   use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this >>>>>>> image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    I get better hits using the term "monostable":

    <https://www.n5dux.com/ham/files/pdf/
    Working%20With%20Monostable%20Multivibrators.pdf>

    Fig 9 is about as simple as it gets. I don't understand why the extra >>>>>> flop and the low pass and stuff after the button in the link you
    posted,
    it's like they never heard of a passive differentiator before.


    Yikes, 36 years old. CD4000B logic.

    I like d-flop one-shots because they are fast, truly edge-triggered, >>>>> and
    can be gated with the D input.

    But RC feedback into a reset input is risky at best. Some flops simply >>>>> won't work that way... they hang up.

    Is this in furtherence of your TDR experimentation? I can't think of
    anything else a one-shot is useful for.

    Phil is doing a TDR project. I'm mostly doing slow precision stuff
    lately.

    I am planning a few new products, and one is a sort of precision pulse
    generator. I was thinking to have the "HIT" flop, the first trigger
    recognizer, be the one-shot. But it's easier to put that inside an
    FPGA. The problem with FPGAs is time jitter, from all the routing
    crosstalk and clock feedthru and ground bounce and power supply
    sensitivity. Maybe they can be managed.

    I tested one Xilinx chip for pin-to-pin delay sensitivity vs core
    supply voltage. It  measured 70 microvolts per picosecond.

    Some people think one-shots are evil, but I like them.

    The supply to delay variation in the Greenpak SPLD 16 bit counter
    configured as a one-shot is around 10, in simulation anyway..


    I'll try to measure it this weekend, I'm interested to see. What general >length of one-shot are we talking?

    In one application, just a few nanoseconds. I figured that I could run
    \Q to \Reset through a gate or two.

    I would use the D input of the flop for "pulse picking".

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From bitrex@21:1/5 to john larkin on Fri Jul 12 12:27:21 2024
    On 7/11/2024 5:21 PM, john larkin wrote:
    On Thu, 11 Jul 2024 12:23:25 -0400, bitrex <user@example.net> wrote:

    On 7/11/2024 12:01 PM, bitrex wrote:
    On 7/10/2024 8:16 PM, john larkin wrote:
    On Wed, 10 Jul 2024 22:50:54 -0000 (UTC), Cursitor Doom
    <cd999666@notformail.com> wrote:

    On Wed, 10 Jul 2024 14:07:55 -0700, john larkin wrote:

    On Wed, 10 Jul 2024 15:56:51 -0400, bitrex <user@example.net> wrote: >>>>>>
    On 7/10/2024 12:16 PM, john larkin wrote:
    If you google   use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this >>>>>>>> image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    I get better hits using the term "monostable":

    <https://www.n5dux.com/ham/files/pdf/
    Working%20With%20Monostable%20Multivibrators.pdf>

    Fig 9 is about as simple as it gets. I don't understand why the extra >>>>>>> flop and the low pass and stuff after the button in the link you >>>>>>> posted,
    it's like they never heard of a passive differentiator before.


    Yikes, 36 years old. CD4000B logic.

    I like d-flop one-shots because they are fast, truly edge-triggered, >>>>>> and
    can be gated with the D input.

    But RC feedback into a reset input is risky at best. Some flops simply >>>>>> won't work that way... they hang up.

    Is this in furtherence of your TDR experimentation? I can't think of >>>>> anything else a one-shot is useful for.

    Phil is doing a TDR project. I'm mostly doing slow precision stuff
    lately.

    I am planning a few new products, and one is a sort of precision pulse >>>> generator. I was thinking to have the "HIT" flop, the first trigger
    recognizer, be the one-shot. But it's easier to put that inside an
    FPGA. The problem with FPGAs is time jitter, from all the routing
    crosstalk and clock feedthru and ground bounce and power supply
    sensitivity. Maybe they can be managed.

    I tested one Xilinx chip for pin-to-pin delay sensitivity vs core
    supply voltage. It  measured 70 microvolts per picosecond.

    Some people think one-shots are evil, but I like them.

    The supply to delay variation in the Greenpak SPLD 16 bit counter
    configured as a one-shot is around 10, in simulation anyway..


    I'll try to measure it this weekend, I'm interested to see. What general
    length of one-shot are we talking?

    In one application, just a few nanoseconds. I figured that I could run
    \Q to \Reset through a gate or two.

    I would use the D input of the flop for "pulse picking".




    Yeah that's tough cuz even at 50 MHz 1 clock is 20 ns and at low counts
    there's also a variable offset a la:

    pulse length = [(Counter data + 1) / CLK input frequency – Offset],

    Where Offset could be in the range 10s of ns at that clock frequency,
    worst case, independent of supply

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From john larkin @21:1/5 to bitrex on Fri Jul 12 09:36:16 2024
    On Fri, 12 Jul 2024 12:27:21 -0400, bitrex <user@example.net> wrote:

    On 7/11/2024 5:21 PM, john larkin wrote:
    On Thu, 11 Jul 2024 12:23:25 -0400, bitrex <user@example.net> wrote:

    On 7/11/2024 12:01 PM, bitrex wrote:
    On 7/10/2024 8:16 PM, john larkin wrote:
    On Wed, 10 Jul 2024 22:50:54 -0000 (UTC), Cursitor Doom
    <cd999666@notformail.com> wrote:

    On Wed, 10 Jul 2024 14:07:55 -0700, john larkin wrote:

    On Wed, 10 Jul 2024 15:56:51 -0400, bitrex <user@example.net> wrote: >>>>>>>
    On 7/10/2024 12:16 PM, john larkin wrote:
    If you google   use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this >>>>>>>>> image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    I get better hits using the term "monostable":

    <https://www.n5dux.com/ham/files/pdf/
    Working%20With%20Monostable%20Multivibrators.pdf>

    Fig 9 is about as simple as it gets. I don't understand why the extra >>>>>>>> flop and the low pass and stuff after the button in the link you >>>>>>>> posted,
    it's like they never heard of a passive differentiator before. >>>>>>>>

    Yikes, 36 years old. CD4000B logic.

    I like d-flop one-shots because they are fast, truly edge-triggered, >>>>>>> and
    can be gated with the D input.

    But RC feedback into a reset input is risky at best. Some flops simply >>>>>>> won't work that way... they hang up.

    Is this in furtherence of your TDR experimentation? I can't think of >>>>>> anything else a one-shot is useful for.

    Phil is doing a TDR project. I'm mostly doing slow precision stuff
    lately.

    I am planning a few new products, and one is a sort of precision pulse >>>>> generator. I was thinking to have the "HIT" flop, the first trigger
    recognizer, be the one-shot. But it's easier to put that inside an
    FPGA. The problem with FPGAs is time jitter, from all the routing
    crosstalk and clock feedthru and ground bounce and power supply
    sensitivity. Maybe they can be managed.

    I tested one Xilinx chip for pin-to-pin delay sensitivity vs core
    supply voltage. It  measured 70 microvolts per picosecond.

    Some people think one-shots are evil, but I like them.

    The supply to delay variation in the Greenpak SPLD 16 bit counter
    configured as a one-shot is around 10, in simulation anyway..


    I'll try to measure it this weekend, I'm interested to see. What general >>> length of one-shot are we talking?

    In one application, just a few nanoseconds. I figured that I could run
    \Q to \Reset through a gate or two.

    I would use the D input of the flop for "pulse picking".




    Yeah that's tough cuz even at 50 MHz 1 clock is 20 ns and at low counts >there's also a variable offset a la:

    pulse length = [(Counter data + 1) / CLK input frequency – Offset],

    Where Offset could be in the range 10s of ns at that clock frequency,
    worst case, independent of supply

    A 1 ns Tiny flop and a 1 ns gate (or even a PCB delay line) would make
    a gated one-shot that would run at a couple hundred MHz.

    Connecting \Q directly to \R would be interesting. I should try that.
    The 1 ns cmos flop is NC7SV74.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From bitrex@21:1/5 to john larkin on Fri Jul 12 21:08:08 2024
    On 7/12/2024 12:36 PM, john larkin wrote:
    On Fri, 12 Jul 2024 12:27:21 -0400, bitrex <user@example.net> wrote:

    On 7/11/2024 5:21 PM, john larkin wrote:
    On Thu, 11 Jul 2024 12:23:25 -0400, bitrex <user@example.net> wrote:

    On 7/11/2024 12:01 PM, bitrex wrote:
    On 7/10/2024 8:16 PM, john larkin wrote:
    On Wed, 10 Jul 2024 22:50:54 -0000 (UTC), Cursitor Doom
    <cd999666@notformail.com> wrote:

    On Wed, 10 Jul 2024 14:07:55 -0700, john larkin wrote:

    On Wed, 10 Jul 2024 15:56:51 -0400, bitrex <user@example.net> wrote: >>>>>>>>
    On 7/10/2024 12:16 PM, john larkin wrote:
    If you google   use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this >>>>>>>>>> image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm


    I get better hits using the term "monostable":

    <https://www.n5dux.com/ham/files/pdf/
    Working%20With%20Monostable%20Multivibrators.pdf>

    Fig 9 is about as simple as it gets. I don't understand why the extra >>>>>>>>> flop and the low pass and stuff after the button in the link you >>>>>>>>> posted,
    it's like they never heard of a passive differentiator before. >>>>>>>>>

    Yikes, 36 years old. CD4000B logic.

    I like d-flop one-shots because they are fast, truly edge-triggered, >>>>>>>> and
    can be gated with the D input.

    But RC feedback into a reset input is risky at best. Some flops simply >>>>>>>> won't work that way... they hang up.

    Is this in furtherence of your TDR experimentation? I can't think of >>>>>>> anything else a one-shot is useful for.

    Phil is doing a TDR project. I'm mostly doing slow precision stuff >>>>>> lately.

    I am planning a few new products, and one is a sort of precision pulse >>>>>> generator. I was thinking to have the "HIT" flop, the first trigger >>>>>> recognizer, be the one-shot. But it's easier to put that inside an >>>>>> FPGA. The problem with FPGAs is time jitter, from all the routing
    crosstalk and clock feedthru and ground bounce and power supply
    sensitivity. Maybe they can be managed.

    I tested one Xilinx chip for pin-to-pin delay sensitivity vs core
    supply voltage. It  measured 70 microvolts per picosecond.

    Some people think one-shots are evil, but I like them.

    The supply to delay variation in the Greenpak SPLD 16 bit counter
    configured as a one-shot is around 10, in simulation anyway..


    I'll try to measure it this weekend, I'm interested to see. What general >>>> length of one-shot are we talking?

    In one application, just a few nanoseconds. I figured that I could run
    \Q to \Reset through a gate or two.

    I would use the D input of the flop for "pulse picking".




    Yeah that's tough cuz even at 50 MHz 1 clock is 20 ns and at low counts
    there's also a variable offset a la:

    pulse length = [(Counter data + 1) / CLK input frequency – Offset],

    Where Offset could be in the range 10s of ns at that clock frequency,
    worst case, independent of supply

    A 1 ns Tiny flop and a 1 ns gate (or even a PCB delay line) would make
    a gated one-shot that would run at a couple hundred MHz.

    Connecting \Q directly to \R would be interesting. I should try that.
    The 1 ns cmos flop is NC7SV74.


    What about using a PCB delay line, and diff amp and driver to take the difference between a short and long path

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From john larkin @21:1/5 to bitrex on Sat Jul 13 06:27:39 2024
    On Fri, 12 Jul 2024 21:08:08 -0400, bitrex <user@example.net> wrote:

    On 7/12/2024 12:36 PM, john larkin wrote:
    On Fri, 12 Jul 2024 12:27:21 -0400, bitrex <user@example.net> wrote:

    On 7/11/2024 5:21 PM, john larkin wrote:
    On Thu, 11 Jul 2024 12:23:25 -0400, bitrex <user@example.net> wrote:

    On 7/11/2024 12:01 PM, bitrex wrote:
    On 7/10/2024 8:16 PM, john larkin wrote:
    On Wed, 10 Jul 2024 22:50:54 -0000 (UTC), Cursitor Doom
    <cd999666@notformail.com> wrote:

    On Wed, 10 Jul 2024 14:07:55 -0700, john larkin wrote:

    On Wed, 10 Jul 2024 15:56:51 -0400, bitrex <user@example.net> wrote: >>>>>>>>>
    On 7/10/2024 12:16 PM, john larkin wrote:
    If you google   use d-flop as one-shot

    you get some remarkably silly circuits. Many just swipe from this >>>>>>>>>>> image:

    http://www.discovercircuits.com/DJ-Circuits/oneshots.htm >>>>>>>>>>>

    I get better hits using the term "monostable":

    <https://www.n5dux.com/ham/files/pdf/
    Working%20With%20Monostable%20Multivibrators.pdf>

    Fig 9 is about as simple as it gets. I don't understand why the extra
    flop and the low pass and stuff after the button in the link you >>>>>>>>>> posted,
    it's like they never heard of a passive differentiator before. >>>>>>>>>>

    Yikes, 36 years old. CD4000B logic.

    I like d-flop one-shots because they are fast, truly edge-triggered, >>>>>>>>> and
    can be gated with the D input.

    But RC feedback into a reset input is risky at best. Some flops simply
    won't work that way... they hang up.

    Is this in furtherence of your TDR experimentation? I can't think of >>>>>>>> anything else a one-shot is useful for.

    Phil is doing a TDR project. I'm mostly doing slow precision stuff >>>>>>> lately.

    I am planning a few new products, and one is a sort of precision pulse >>>>>>> generator. I was thinking to have the "HIT" flop, the first trigger >>>>>>> recognizer, be the one-shot. But it's easier to put that inside an >>>>>>> FPGA. The problem with FPGAs is time jitter, from all the routing >>>>>>> crosstalk and clock feedthru and ground bounce and power supply
    sensitivity. Maybe they can be managed.

    I tested one Xilinx chip for pin-to-pin delay sensitivity vs core >>>>>>> supply voltage. It  measured 70 microvolts per picosecond.

    Some people think one-shots are evil, but I like them.

    The supply to delay variation in the Greenpak SPLD 16 bit counter
    configured as a one-shot is around 10, in simulation anyway..


    I'll try to measure it this weekend, I'm interested to see. What general >>>>> length of one-shot are we talking?

    In one application, just a few nanoseconds. I figured that I could run >>>> \Q to \Reset through a gate or two.

    I would use the D input of the flop for "pulse picking".




    Yeah that's tough cuz even at 50 MHz 1 clock is 20 ns and at low counts
    there's also a variable offset a la:

    pulse length = [(Counter data + 1) / CLK input frequency – Offset],

    Where Offset could be in the range 10s of ns at that clock frequency,
    worst case, independent of supply

    A 1 ns Tiny flop and a 1 ns gate (or even a PCB delay line) would make
    a gated one-shot that would run at a couple hundred MHz.

    Connecting \Q directly to \R would be interesting. I should try that.
    The 1 ns cmos flop is NC7SV74.


    What about using a PCB delay line, and diff amp and driver to take the >difference between a short and long path

    That works, a delay line and some fast gate. But it doesn't have the
    clean edge response of a proper one-shot, or the D input that can be
    used for gating.

    The delay line can be a few gates, so you can do the whole thing in
    one quad gate package.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Buzz McCool@21:1/5 to john larkin on Mon Aug 5 09:59:42 2024
    On 7/10/2024 2:07 PM, john larkin wrote:
    Yikes, 36 years old. CD4000B logic.

    ... but you can get these as HCC4000B rad-hard logic like an
    HCC4538B rad-hard dual precision monostable multivibrator.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)