This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into
LT Spice. One of my guys can run the TI simulator, so I'll let him
tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the
current shunt measurement.
Version 4
SHEET 1 1872 756
WIRE 96 -112 16 -112
WIRE 192 -112 96 -112
WIRE 368 -112 192 -112
WIRE 16 -48 16 -112
WIRE 368 -48 368 -112
WIRE 192 0 192 -112
WIRE 224 0 192 0
WIRE 16 80 16 32
WIRE 656 192 512 192
WIRE 848 192 736 192
WIRE 976 192 848 192
WIRE 1040 192 976 192
WIRE 1104 192 1040 192
WIRE 1168 192 1104 192
WIRE 1312 192 1248 192
WIRE 1376 192 1312 192
WIRE 1520 192 1456 192
WIRE 1648 192 1520 192
WIRE 1712 192 1648 192
WIRE 1776 192 1712 192
WIRE 976 208 976 192
WIRE 1648 256 1648 192
WIRE 1104 272 1104 192
WIRE 1312 272 1312 192
WIRE 1520 272 1520 192
WIRE 96 288 16 288
WIRE 224 288 160 288
WIRE 688 288 512 288
WIRE 1776 288 1776 192
WIRE 976 304 976 272
WIRE 848 320 848 192
WIRE 16 384 16 288
WIRE 96 384 16 384
WIRE 224 384 176 384
WIRE 560 384 512 384
WIRE 976 416 976 384
WIRE 1104 416 1104 336
WIRE 1312 416 1312 336
WIRE 1520 416 1520 336
WIRE 1648 416 1648 336
WIRE 1776 416 1776 352
WIRE 688 432 688 288
WIRE 736 432 688 432
WIRE 848 432 848 384
WIRE 848 432 800 432
WIRE 16 448 16 384
WIRE 560 448 560 384
WIRE 384 560 320 560
WIRE 560 560 464 560
WIRE 688 560 688 432
WIRE 688 560 640 560
WIRE 736 560 688 560
WIRE 848 560 848 432
WIRE 848 560 816 560
WIRE 944 560 848 560
WIRE 1072 560 1024 560
WIRE 1104 560 1072 560
WIRE 320 624 320 560
FLAG 16 80 0
FLAG 976 416 0
FLAG 1648 416 0
FLAG 1712 192 OUT
FLAG 96 -112 IN
FLAG 320 624 0
FLAG 1104 416 0
FLAG 16 448 0
FLAG 560 448 0
FLAG 1520 416 0
FLAG 1776 416 0
FLAG 1312 416 0
FLAG 1040 192 MID
FLAG 1072 560 OUT
SYMBOL res 192 368 R90
WINDOW 0 59 55 VBottom 2
WINDOW 3 62 57 VTop 2
SYMATTR InstName R1
SYMATTR Value 150K
SYMBOL cap 160 272 R90
WINDOW 0 -37 31 VBottom 2
WINDOW 3 -31 28 VTop 2
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL voltage 16 -64 R0
WINDOW 0 30 95 Left 2
WINDOW 3 29 122 Left 2
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL res 832 544 R90
WINDOW 0 -40 62 VBottom 2
WINDOW 3 -32 57 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 656 544 R90
WINDOW 0 -37 59 VBottom 2
WINDOW 3 -31 59 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL cap 800 416 R90
WINDOW 0 -34 36 VBottom 2
WINDOW 3 -30 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 4n
SYMBOL res 1632 240 R0
WINDOW 0 42 52 Left 2
WINDOW 3 53 81 Left 2
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL LT8609S 368 192 R0
SYMATTR InstName U1
SYMBOL cap 960 208 R0
WINDOW 3 49 47 Left 2
WINDOW 0 57 23 Left 2
SYMATTR Value 56µ
SYMATTR SpiceLine Rser=2m
SYMATTR InstName C2
SYMBOL ind 640 208 R270
WINDOW 0 77 58 VTop 2
WINDOW 3 68 60 VBottom 2
SYMATTR InstName L1
SYMATTR Value 47µ
SYMATTR SpiceLine Rser=37m
SYMBOL voltage 480 560 R90
WINDOW 0 40 -2 VBottom 2
WINDOW 3 45 54 VTop 2
SYMATTR InstName V2
SYMATTR Value 0.553
SYMBOL res 960 288 R0
WINDOW 0 48 42 Left 2
WINDOW 3 56 65 Left 2
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL cap 1088 272 R0
WINDOW 0 47 22 Left 2
WINDOW 3 44 48 Left 2
SYMATTR InstName C3
SYMATTR Value 10µ
SYMBOL res 1360 208 R270
WINDOW 0 70 54 VTop 2
WINDOW 3 62 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 0.1
SYMBOL cap 1504 272 R0
WINDOW 0 56 19 Left 2
WINDOW 3 53 47 Left 2
SYMATTR InstName C4
SYMATTR Value 56µ
SYMBOL cap 1760 288 R0
WINDOW 0 55 4 Left 2
WINDOW 3 58 34 Left 2
SYMATTR InstName Cload
SYMATTR Value 100µ
SYMBOL res 1152 208 R270
WINDOW 0 72 60 VTop 2
WINDOW 3 66 63 VBottom 2
SYMATTR InstName R6
SYMATTR Value 0.5
SYMBOL schottky 1328 336 R180
WINDOW 0 -47 -3 Left 2
WINDOW 3 -123 -33 Left 2
SYMATTR InstName D1
SYMATTR Value RB095T-90
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 1040 544 R90
WINDOW 0 -37 58 VBottom 2
WINDOW 3 -30 59 VTop 2
SYMATTR InstName R7
SYMATTR Value 1K
SYMBOL cap 832 320 R0
WINDOW 0 48 27 Left 2
WINDOW 3 50 57 Left 2
SYMATTR InstName C6
SYMATTR Value 2µ
TEXT 808 88 Left 2 !.tran 0 10m 0 20n startup
TEXT 1384 224 Left 2 ;polyfuse
TEXT 840 16 Left 2 ;P943 Power Supply
TEXT 856 48 Left 2 ;JL Oct 31 2023
TEXT 528 56 Left 2 ;<< TI LMR38010
TEXT 536 272 Left 2 ;0.774
TEXT 1184 224 Left 2 ;shunt
TEXT 408 504 Left 2
TEXT 96 472 Left 2 ;300 KHz
On 01/11/2023 12:58 am, John Larkin wrote:
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into
LT Spice. One of my guys can run the TI simulator, so I'll let him
tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the
current shunt measurement.
Version 4
SHEET 1 1872 756
WIRE 96 -112 16 -112
WIRE 192 -112 96 -112
WIRE 368 -112 192 -112
WIRE 16 -48 16 -112
WIRE 368 -48 368 -112
WIRE 192 0 192 -112
WIRE 224 0 192 0
WIRE 16 80 16 32
WIRE 656 192 512 192
WIRE 848 192 736 192
WIRE 976 192 848 192
WIRE 1040 192 976 192
WIRE 1104 192 1040 192
WIRE 1168 192 1104 192
WIRE 1312 192 1248 192
WIRE 1376 192 1312 192
WIRE 1520 192 1456 192
WIRE 1648 192 1520 192
WIRE 1712 192 1648 192
WIRE 1776 192 1712 192
WIRE 976 208 976 192
WIRE 1648 256 1648 192
WIRE 1104 272 1104 192
WIRE 1312 272 1312 192
WIRE 1520 272 1520 192
WIRE 96 288 16 288
WIRE 224 288 160 288
WIRE 688 288 512 288
WIRE 1776 288 1776 192
WIRE 976 304 976 272
WIRE 848 320 848 192
WIRE 16 384 16 288
WIRE 96 384 16 384
WIRE 224 384 176 384
WIRE 560 384 512 384
WIRE 976 416 976 384
WIRE 1104 416 1104 336
WIRE 1312 416 1312 336
WIRE 1520 416 1520 336
WIRE 1648 416 1648 336
WIRE 1776 416 1776 352
WIRE 688 432 688 288
WIRE 736 432 688 432
WIRE 848 432 848 384
WIRE 848 432 800 432
WIRE 16 448 16 384
WIRE 560 448 560 384
WIRE 384 560 320 560
WIRE 560 560 464 560
WIRE 688 560 688 432
WIRE 688 560 640 560
WIRE 736 560 688 560
WIRE 848 560 848 432
WIRE 848 560 816 560
WIRE 944 560 848 560
WIRE 1072 560 1024 560
WIRE 1104 560 1072 560
WIRE 320 624 320 560
FLAG 16 80 0
FLAG 976 416 0
FLAG 1648 416 0
FLAG 1712 192 OUT
FLAG 96 -112 IN
FLAG 320 624 0
FLAG 1104 416 0
FLAG 16 448 0
FLAG 560 448 0
FLAG 1520 416 0
FLAG 1776 416 0
FLAG 1312 416 0
FLAG 1040 192 MID
FLAG 1072 560 OUT
SYMBOL res 192 368 R90
WINDOW 0 59 55 VBottom 2
WINDOW 3 62 57 VTop 2
SYMATTR InstName R1
SYMATTR Value 150K
SYMBOL cap 160 272 R90
WINDOW 0 -37 31 VBottom 2
WINDOW 3 -31 28 VTop 2
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL voltage 16 -64 R0
WINDOW 0 30 95 Left 2
WINDOW 3 29 122 Left 2
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL res 832 544 R90
WINDOW 0 -40 62 VBottom 2
WINDOW 3 -32 57 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 656 544 R90
WINDOW 0 -37 59 VBottom 2
WINDOW 3 -31 59 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL cap 800 416 R90
WINDOW 0 -34 36 VBottom 2
WINDOW 3 -30 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 4n
SYMBOL res 1632 240 R0
WINDOW 0 42 52 Left 2
WINDOW 3 53 81 Left 2
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL LT8609S 368 192 R0
SYMATTR InstName U1
SYMBOL cap 960 208 R0
WINDOW 3 49 47 Left 2
WINDOW 0 57 23 Left 2
SYMATTR Value 56µ
SYMATTR SpiceLine Rser=2m
SYMATTR InstName C2
SYMBOL ind 640 208 R270
WINDOW 0 77 58 VTop 2
WINDOW 3 68 60 VBottom 2
SYMATTR InstName L1
SYMATTR Value 47µ
SYMATTR SpiceLine Rser=37m
SYMBOL voltage 480 560 R90
WINDOW 0 40 -2 VBottom 2
WINDOW 3 45 54 VTop 2
SYMATTR InstName V2
SYMATTR Value 0.553
SYMBOL res 960 288 R0
WINDOW 0 48 42 Left 2
WINDOW 3 56 65 Left 2
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL cap 1088 272 R0
WINDOW 0 47 22 Left 2
WINDOW 3 44 48 Left 2
SYMATTR InstName C3
SYMATTR Value 10µ
SYMBOL res 1360 208 R270
WINDOW 0 70 54 VTop 2
WINDOW 3 62 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 0.1
SYMBOL cap 1504 272 R0
WINDOW 0 56 19 Left 2
WINDOW 3 53 47 Left 2
SYMATTR InstName C4
SYMATTR Value 56µ
SYMBOL cap 1760 288 R0
WINDOW 0 55 4 Left 2
WINDOW 3 58 34 Left 2
SYMATTR InstName Cload
SYMATTR Value 100µ
SYMBOL res 1152 208 R270
WINDOW 0 72 60 VTop 2
WINDOW 3 66 63 VBottom 2
SYMATTR InstName R6
SYMATTR Value 0.5
SYMBOL schottky 1328 336 R180
WINDOW 0 -47 -3 Left 2
WINDOW 3 -123 -33 Left 2
SYMATTR InstName D1
SYMATTR Value RB095T-90
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 1040 544 R90
WINDOW 0 -37 58 VBottom 2
WINDOW 3 -30 59 VTop 2
SYMATTR InstName R7
SYMATTR Value 1K
SYMBOL cap 832 320 R0
WINDOW 0 48 27 Left 2
WINDOW 3 50 57 Left 2
SYMATTR InstName C6
SYMATTR Value 2µ
TEXT 808 88 Left 2 !.tran 0 10m 0 20n startup
TEXT 1384 224 Left 2 ;polyfuse
TEXT 840 16 Left 2 ;P943 Power Supply
TEXT 856 48 Left 2 ;JL Oct 31 2023
TEXT 528 56 Left 2 ;<< TI LMR38010
TEXT 536 272 Left 2 ;0.774
TEXT 1184 224 Left 2 ;shunt
TEXT 408 504 Left 2
TEXT 96 472 Left 2 ;300 KHz
It uses a rather compressed range of the DAC output but looks alright.
piglet
On Wed, 1 Nov 2023 11:03:34 +0000, piglet <erichpwagner@hotmail.com>
wrote:
On 01/11/2023 12:58 am, John Larkin wrote:
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into
LT Spice. One of my guys can run the TI simulator, so I'll let him
tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the
current shunt measurement.
Version 4
SHEET 1 1872 756
WIRE 96 -112 16 -112
WIRE 192 -112 96 -112
WIRE 368 -112 192 -112
WIRE 16 -48 16 -112
WIRE 368 -48 368 -112
WIRE 192 0 192 -112
WIRE 224 0 192 0
WIRE 16 80 16 32
WIRE 656 192 512 192
WIRE 848 192 736 192
WIRE 976 192 848 192
WIRE 1040 192 976 192
WIRE 1104 192 1040 192
WIRE 1168 192 1104 192
WIRE 1312 192 1248 192
WIRE 1376 192 1312 192
WIRE 1520 192 1456 192
WIRE 1648 192 1520 192
WIRE 1712 192 1648 192
WIRE 1776 192 1712 192
WIRE 976 208 976 192
WIRE 1648 256 1648 192
WIRE 1104 272 1104 192
WIRE 1312 272 1312 192
WIRE 1520 272 1520 192
WIRE 96 288 16 288
WIRE 224 288 160 288
WIRE 688 288 512 288
WIRE 1776 288 1776 192
WIRE 976 304 976 272
WIRE 848 320 848 192
WIRE 16 384 16 288
WIRE 96 384 16 384
WIRE 224 384 176 384
WIRE 560 384 512 384
WIRE 976 416 976 384
WIRE 1104 416 1104 336
WIRE 1312 416 1312 336
WIRE 1520 416 1520 336
WIRE 1648 416 1648 336
WIRE 1776 416 1776 352
WIRE 688 432 688 288
WIRE 736 432 688 432
WIRE 848 432 848 384
WIRE 848 432 800 432
WIRE 16 448 16 384
WIRE 560 448 560 384
WIRE 384 560 320 560
WIRE 560 560 464 560
WIRE 688 560 688 432
WIRE 688 560 640 560
WIRE 736 560 688 560
WIRE 848 560 848 432
WIRE 848 560 816 560
WIRE 944 560 848 560
WIRE 1072 560 1024 560
WIRE 1104 560 1072 560
WIRE 320 624 320 560
FLAG 16 80 0
FLAG 976 416 0
FLAG 1648 416 0
FLAG 1712 192 OUT
FLAG 96 -112 IN
FLAG 320 624 0
FLAG 1104 416 0
FLAG 16 448 0
FLAG 560 448 0
FLAG 1520 416 0
FLAG 1776 416 0
FLAG 1312 416 0
FLAG 1040 192 MID
FLAG 1072 560 OUT
SYMBOL res 192 368 R90
WINDOW 0 59 55 VBottom 2
WINDOW 3 62 57 VTop 2
SYMATTR InstName R1
SYMATTR Value 150K
SYMBOL cap 160 272 R90
WINDOW 0 -37 31 VBottom 2
WINDOW 3 -31 28 VTop 2
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL voltage 16 -64 R0
WINDOW 0 30 95 Left 2
WINDOW 3 29 122 Left 2
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL res 832 544 R90
WINDOW 0 -40 62 VBottom 2
WINDOW 3 -32 57 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 656 544 R90
WINDOW 0 -37 59 VBottom 2
WINDOW 3 -31 59 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL cap 800 416 R90
WINDOW 0 -34 36 VBottom 2
WINDOW 3 -30 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 4n
SYMBOL res 1632 240 R0
WINDOW 0 42 52 Left 2
WINDOW 3 53 81 Left 2
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL LT8609S 368 192 R0
SYMATTR InstName U1
SYMBOL cap 960 208 R0
WINDOW 3 49 47 Left 2
WINDOW 0 57 23 Left 2
SYMATTR Value 56µ
SYMATTR SpiceLine Rser=2m
SYMATTR InstName C2
SYMBOL ind 640 208 R270
WINDOW 0 77 58 VTop 2
WINDOW 3 68 60 VBottom 2
SYMATTR InstName L1
SYMATTR Value 47µ
SYMATTR SpiceLine Rser=37m
SYMBOL voltage 480 560 R90
WINDOW 0 40 -2 VBottom 2
WINDOW 3 45 54 VTop 2
SYMATTR InstName V2
SYMATTR Value 0.553
SYMBOL res 960 288 R0
WINDOW 0 48 42 Left 2
WINDOW 3 56 65 Left 2
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL cap 1088 272 R0
WINDOW 0 47 22 Left 2
WINDOW 3 44 48 Left 2
SYMATTR InstName C3
SYMATTR Value 10µ
SYMBOL res 1360 208 R270
WINDOW 0 70 54 VTop 2
WINDOW 3 62 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 0.1
SYMBOL cap 1504 272 R0
WINDOW 0 56 19 Left 2
WINDOW 3 53 47 Left 2
SYMATTR InstName C4
SYMATTR Value 56µ
SYMBOL cap 1760 288 R0
WINDOW 0 55 4 Left 2
WINDOW 3 58 34 Left 2
SYMATTR InstName Cload
SYMATTR Value 100µ
SYMBOL res 1152 208 R270
WINDOW 0 72 60 VTop 2
WINDOW 3 66 63 VBottom 2
SYMATTR InstName R6
SYMATTR Value 0.5
SYMBOL schottky 1328 336 R180
WINDOW 0 -47 -3 Left 2
WINDOW 3 -123 -33 Left 2
SYMATTR InstName D1
SYMATTR Value RB095T-90
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 1040 544 R90
WINDOW 0 -37 58 VBottom 2
WINDOW 3 -30 59 VTop 2
SYMATTR InstName R7
SYMATTR Value 1K
SYMBOL cap 832 320 R0
WINDOW 0 48 27 Left 2
WINDOW 3 50 57 Left 2
SYMATTR InstName C6
SYMATTR Value 2µ
TEXT 808 88 Left 2 !.tran 0 10m 0 20n startup
TEXT 1384 224 Left 2 ;polyfuse
TEXT 840 16 Left 2 ;P943 Power Supply
TEXT 856 48 Left 2 ;JL Oct 31 2023
TEXT 528 56 Left 2 ;<< TI LMR38010
TEXT 536 272 Left 2 ;0.774
TEXT 1184 224 Left 2 ;shunt
TEXT 408 504 Left 2
TEXT 96 472 Left 2 ;300 KHz
It uses a rather compressed range of the DAC output but looks alright.
piglet
The TI chip has a 1 volt feedback setpoint, so I could use a 1.2v
bandgap for the DAC reference. The resulting DAC range might make the
output go 0 to 48 volts or some such, and we'd calibrate the exact
limits.
The TI has an enable pin too. We could set up the DACs for zero out
and then enable.
One issue with a buck switcher is that it works in both directions, so
we can possibly pump load power uphill into our 48 volt supply. That
leads to an ultraviolet catastrophe doom loop, so we would disable the switcher of we sense it doing that. That logic will be tricky.
On 01/11/2023 14:43, John Larkin wrote:<snip>
On Wed, 1 Nov 2023 11:03:34 +0000, piglet <erichpwagner@hotmail.com>
wrote:
On 01/11/2023 12:58 am, John Larkin wrote:
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into
LT Spice. One of my guys can run the TI simulator, so I'll let him
tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the
current shunt measurement.
It uses a rather compressed range of the DAC output but looks alright.
piglet
The TI chip has a 1 volt feedback setpoint, so I could use a 1.2v
bandgap for the DAC reference. The resulting DAC range might make the
output go 0 to 48 volts or some such, and we'd calibrate the exact
limits.
The TI has an enable pin too. We could set up the DACs for zero out
and then enable.
One issue with a buck switcher is that it works in both directions, so
we can possibly pump load power uphill into our 48 volt supply. That
leads to an ultraviolet catastrophe doom loop, so we would disable the
switcher of we sense it doing that. That logic will be tricky.
Current sense metrology might be one way?
piglet
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into
LT Spice. One of my guys can run the TI simulator, so I'll let him
tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the
current shunt measurement.
On Wednesday, November 1, 2023 at 11:59:33?AM UTC+11, John Larkin wrote:got me huge spikes. A 1uH ferrite bead in series (out of the Wurth range, good for about 3A) tamed the spikes back to merely big.
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into
LT Spice. One of my guys can run the TI simulator, so I'll let him
tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the
current shunt measurement.
I ran it. It looked sort of sensible, until I looked L1 which hasn't got an parallel capacitance at all. I put in 1pF - which would be low (series resonance at 23MHz) and got big switching spikes. A more realistic 10pF (series resonant at about 7MHz)
Replacing L1 with four 12uH Wurth beads in series gave even smaller switching spikes
It pays to use realistic models in LTSpice. If John had worked out what he was going to use for L1 the manufacturer's data sheet should have given him the self-resonant frequency and the parallel capacitance.
piglet <erichpwagner@hotmail.com> wrote:
On 01/11/2023 14:43, John Larkin wrote:<snip>
On Wed, 1 Nov 2023 11:03:34 +0000, piglet <erichpwagner@hotmail.com>
wrote:
On 01/11/2023 12:58 am, John Larkin wrote:
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into >>>>> LT Spice. One of my guys can run the TI simulator, so I'll let him
tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the
current shunt measurement.
It uses a rather compressed range of the DAC output but looks alright. >>>>
piglet
The TI chip has a 1 volt feedback setpoint, so I could use a 1.2v
bandgap for the DAC reference. The resulting DAC range might make the
output go 0 to 48 volts or some such, and we'd calibrate the exact
limits.
The TI has an enable pin too. We could set up the DACs for zero out
and then enable.
One issue with a buck switcher is that it works in both directions, so
we can possibly pump load power uphill into our 48 volt supply. That
leads to an ultraviolet catastrophe doom loop, so we would disable the
switcher of we sense it doing that. That logic will be tricky.
Current sense metrology might be one way?
piglet
One approach would be to put a diode in series with the input, and check
that the voltage drop goes the right way.
Cheers
Phil Hobbs
On 01/11/2023 14:43, John Larkin wrote:
On Wed, 1 Nov 2023 11:03:34 +0000, piglet <erichpwagner@hotmail.com>
wrote:
On 01/11/2023 12:58 am, John Larkin wrote:
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into
LT Spice. One of my guys can run the TI simulator, so I'll let him
tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the
current shunt measurement.
Version 4
SHEET 1 1872 756
WIRE 96 -112 16 -112
WIRE 192 -112 96 -112
WIRE 368 -112 192 -112
WIRE 16 -48 16 -112
WIRE 368 -48 368 -112
WIRE 192 0 192 -112
WIRE 224 0 192 0
WIRE 16 80 16 32
WIRE 656 192 512 192
WIRE 848 192 736 192
WIRE 976 192 848 192
WIRE 1040 192 976 192
WIRE 1104 192 1040 192
WIRE 1168 192 1104 192
WIRE 1312 192 1248 192
WIRE 1376 192 1312 192
WIRE 1520 192 1456 192
WIRE 1648 192 1520 192
WIRE 1712 192 1648 192
WIRE 1776 192 1712 192
WIRE 976 208 976 192
WIRE 1648 256 1648 192
WIRE 1104 272 1104 192
WIRE 1312 272 1312 192
WIRE 1520 272 1520 192
WIRE 96 288 16 288
WIRE 224 288 160 288
WIRE 688 288 512 288
WIRE 1776 288 1776 192
WIRE 976 304 976 272
WIRE 848 320 848 192
WIRE 16 384 16 288
WIRE 96 384 16 384
WIRE 224 384 176 384
WIRE 560 384 512 384
WIRE 976 416 976 384
WIRE 1104 416 1104 336
WIRE 1312 416 1312 336
WIRE 1520 416 1520 336
WIRE 1648 416 1648 336
WIRE 1776 416 1776 352
WIRE 688 432 688 288
WIRE 736 432 688 432
WIRE 848 432 848 384
WIRE 848 432 800 432
WIRE 16 448 16 384
WIRE 560 448 560 384
WIRE 384 560 320 560
WIRE 560 560 464 560
WIRE 688 560 688 432
WIRE 688 560 640 560
WIRE 736 560 688 560
WIRE 848 560 848 432
WIRE 848 560 816 560
WIRE 944 560 848 560
WIRE 1072 560 1024 560
WIRE 1104 560 1072 560
WIRE 320 624 320 560
FLAG 16 80 0
FLAG 976 416 0
FLAG 1648 416 0
FLAG 1712 192 OUT
FLAG 96 -112 IN
FLAG 320 624 0
FLAG 1104 416 0
FLAG 16 448 0
FLAG 560 448 0
FLAG 1520 416 0
FLAG 1776 416 0
FLAG 1312 416 0
FLAG 1040 192 MID
FLAG 1072 560 OUT
SYMBOL res 192 368 R90
WINDOW 0 59 55 VBottom 2
WINDOW 3 62 57 VTop 2
SYMATTR InstName R1
SYMATTR Value 150K
SYMBOL cap 160 272 R90
WINDOW 0 -37 31 VBottom 2
WINDOW 3 -31 28 VTop 2
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL voltage 16 -64 R0
WINDOW 0 30 95 Left 2
WINDOW 3 29 122 Left 2
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL res 832 544 R90
WINDOW 0 -40 62 VBottom 2
WINDOW 3 -32 57 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 656 544 R90
WINDOW 0 -37 59 VBottom 2
WINDOW 3 -31 59 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL cap 800 416 R90
WINDOW 0 -34 36 VBottom 2
WINDOW 3 -30 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 4n
SYMBOL res 1632 240 R0
WINDOW 0 42 52 Left 2
WINDOW 3 53 81 Left 2
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL LT8609S 368 192 R0
SYMATTR InstName U1
SYMBOL cap 960 208 R0
WINDOW 3 49 47 Left 2
WINDOW 0 57 23 Left 2
SYMATTR Value 56µ
SYMATTR SpiceLine Rser=2m
SYMATTR InstName C2
SYMBOL ind 640 208 R270
WINDOW 0 77 58 VTop 2
WINDOW 3 68 60 VBottom 2
SYMATTR InstName L1
SYMATTR Value 47µ
SYMATTR SpiceLine Rser=37m
SYMBOL voltage 480 560 R90
WINDOW 0 40 -2 VBottom 2
WINDOW 3 45 54 VTop 2
SYMATTR InstName V2
SYMATTR Value 0.553
SYMBOL res 960 288 R0
WINDOW 0 48 42 Left 2
WINDOW 3 56 65 Left 2
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL cap 1088 272 R0
WINDOW 0 47 22 Left 2
WINDOW 3 44 48 Left 2
SYMATTR InstName C3
SYMATTR Value 10µ
SYMBOL res 1360 208 R270
WINDOW 0 70 54 VTop 2
WINDOW 3 62 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 0.1
SYMBOL cap 1504 272 R0
WINDOW 0 56 19 Left 2
WINDOW 3 53 47 Left 2
SYMATTR InstName C4
SYMATTR Value 56µ
SYMBOL cap 1760 288 R0
WINDOW 0 55 4 Left 2
WINDOW 3 58 34 Left 2
SYMATTR InstName Cload
SYMATTR Value 100µ
SYMBOL res 1152 208 R270
WINDOW 0 72 60 VTop 2
WINDOW 3 66 63 VBottom 2
SYMATTR InstName R6
SYMATTR Value 0.5
SYMBOL schottky 1328 336 R180
WINDOW 0 -47 -3 Left 2
WINDOW 3 -123 -33 Left 2
SYMATTR InstName D1
SYMATTR Value RB095T-90
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 1040 544 R90
WINDOW 0 -37 58 VBottom 2
WINDOW 3 -30 59 VTop 2
SYMATTR InstName R7
SYMATTR Value 1K
SYMBOL cap 832 320 R0
WINDOW 0 48 27 Left 2
WINDOW 3 50 57 Left 2
SYMATTR InstName C6
SYMATTR Value 2µ
TEXT 808 88 Left 2 !.tran 0 10m 0 20n startup
TEXT 1384 224 Left 2 ;polyfuse
TEXT 840 16 Left 2 ;P943 Power Supply
TEXT 856 48 Left 2 ;JL Oct 31 2023
TEXT 528 56 Left 2 ;<< TI LMR38010
TEXT 536 272 Left 2 ;0.774
TEXT 1184 224 Left 2 ;shunt
TEXT 408 504 Left 2
TEXT 96 472 Left 2 ;300 KHz
It uses a rather compressed range of the DAC output but looks alright.
piglet
The TI chip has a 1 volt feedback setpoint, so I could use a 1.2v
bandgap for the DAC reference. The resulting DAC range might make the
output go 0 to 48 volts or some such, and we'd calibrate the exact
limits.
The TI has an enable pin too. We could set up the DACs for zero out
and then enable.
One issue with a buck switcher is that it works in both directions, so
we can possibly pump load power uphill into our 48 volt supply. That
leads to an ultraviolet catastrophe doom loop, so we would disable the
switcher of we sense it doing that. That logic will be tricky.
Current sense metrology might be one way?
piglet
On Wed, 1 Nov 2023 15:15:15 +0000, piglet <erichp...@hotmail.com>
wrote:
On 01/11/2023 14:43, John Larkin wrote:
On Wed, 1 Nov 2023 11:03:34 +0000, piglet <erichp...@hotmail.com>
wrote:
On 01/11/2023 12:58 am, John Larkin wrote:
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into >>>> LT Spice. One of my guys can run the TI simulator, so I'll let him
tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the
current shunt measurement.
Version 4
SHEET 1 1872 756
WIRE 96 -112 16 -112
WIRE 192 -112 96 -112
WIRE 368 -112 192 -112
WIRE 16 -48 16 -112
WIRE 368 -48 368 -112
WIRE 192 0 192 -112
WIRE 224 0 192 0
WIRE 16 80 16 32
WIRE 656 192 512 192
WIRE 848 192 736 192
WIRE 976 192 848 192
WIRE 1040 192 976 192
WIRE 1104 192 1040 192
WIRE 1168 192 1104 192
WIRE 1312 192 1248 192
WIRE 1376 192 1312 192
WIRE 1520 192 1456 192
WIRE 1648 192 1520 192
WIRE 1712 192 1648 192
WIRE 1776 192 1712 192
WIRE 976 208 976 192
WIRE 1648 256 1648 192
WIRE 1104 272 1104 192
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WIRE 1520 272 1520 192
WIRE 96 288 16 288
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WIRE 688 432 688 288
WIRE 736 432 688 432
WIRE 848 432 848 384
WIRE 848 432 800 432
WIRE 16 448 16 384
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WIRE 384 560 320 560
WIRE 560 560 464 560
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WIRE 688 560 640 560
WIRE 736 560 688 560
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WIRE 848 560 816 560
WIRE 944 560 848 560
WIRE 1072 560 1024 560
WIRE 1104 560 1072 560
WIRE 320 624 320 560
FLAG 16 80 0
FLAG 976 416 0
FLAG 1648 416 0
FLAG 1712 192 OUT
FLAG 96 -112 IN
FLAG 320 624 0
FLAG 1104 416 0
FLAG 16 448 0
FLAG 560 448 0
FLAG 1520 416 0
FLAG 1776 416 0
FLAG 1312 416 0
FLAG 1040 192 MID
FLAG 1072 560 OUT
SYMBOL res 192 368 R90
WINDOW 0 59 55 VBottom 2
WINDOW 3 62 57 VTop 2
SYMATTR InstName R1
SYMATTR Value 150K
SYMBOL cap 160 272 R90
WINDOW 0 -37 31 VBottom 2
WINDOW 3 -31 28 VTop 2
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SYMATTR Value 200p
SYMBOL voltage 16 -64 R0
WINDOW 0 30 95 Left 2
WINDOW 3 29 122 Left 2
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SYMATTR Value 48
SYMBOL res 832 544 R90
WINDOW 0 -40 62 VBottom 2
WINDOW 3 -32 57 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 656 544 R90
WINDOW 0 -37 59 VBottom 2
WINDOW 3 -31 59 VTop 2
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SYMATTR Value 1K
SYMBOL cap 800 416 R90
WINDOW 0 -34 36 VBottom 2
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SYMATTR Value 4n
SYMBOL res 1632 240 R0
WINDOW 0 42 52 Left 2
WINDOW 3 53 81 Left 2
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SYMATTR Value 24
SYMBOL LT8609S 368 192 R0
SYMATTR InstName U1
SYMBOL cap 960 208 R0
WINDOW 3 49 47 Left 2
WINDOW 0 57 23 Left 2
SYMATTR Value 56µ
SYMATTR SpiceLine Rser=2m
SYMATTR InstName C2
SYMBOL ind 640 208 R270
WINDOW 0 77 58 VTop 2
WINDOW 3 68 60 VBottom 2
SYMATTR InstName L1
SYMATTR Value 47µ
SYMATTR SpiceLine Rser=37m
SYMBOL voltage 480 560 R90
WINDOW 0 40 -2 VBottom 2
WINDOW 3 45 54 VTop 2
SYMATTR InstName V2
SYMATTR Value 0.553
SYMBOL res 960 288 R0
WINDOW 0 48 42 Left 2
WINDOW 3 56 65 Left 2
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL cap 1088 272 R0
WINDOW 0 47 22 Left 2
WINDOW 3 44 48 Left 2
SYMATTR InstName C3
SYMATTR Value 10µ
SYMBOL res 1360 208 R270
WINDOW 0 70 54 VTop 2
WINDOW 3 62 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 0.1
SYMBOL cap 1504 272 R0
WINDOW 0 56 19 Left 2
WINDOW 3 53 47 Left 2
SYMATTR InstName C4
SYMATTR Value 56µ
SYMBOL cap 1760 288 R0
WINDOW 0 55 4 Left 2
WINDOW 3 58 34 Left 2
SYMATTR InstName Cload
SYMATTR Value 100µ
SYMBOL res 1152 208 R270
WINDOW 0 72 60 VTop 2
WINDOW 3 66 63 VBottom 2
SYMATTR InstName R6
SYMATTR Value 0.5
SYMBOL schottky 1328 336 R180
WINDOW 0 -47 -3 Left 2
WINDOW 3 -123 -33 Left 2
SYMATTR InstName D1
SYMATTR Value RB095T-90
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 1040 544 R90
WINDOW 0 -37 58 VBottom 2
WINDOW 3 -30 59 VTop 2
SYMATTR InstName R7
SYMATTR Value 1K
SYMBOL cap 832 320 R0
WINDOW 0 48 27 Left 2
WINDOW 3 50 57 Left 2
SYMATTR InstName C6
SYMATTR Value 2µ
TEXT 808 88 Left 2 !.tran 0 10m 0 20n startup
TEXT 1384 224 Left 2 ;polyfuse
TEXT 840 16 Left 2 ;P943 Power Supply
TEXT 856 48 Left 2 ;JL Oct 31 2023
TEXT 528 56 Left 2 ;<< TI LMR38010
TEXT 536 272 Left 2 ;0.774
TEXT 1184 224 Left 2 ;shunt
TEXT 408 504 Left 2
TEXT 96 472 Left 2 ;300 KHz
It uses a rather compressed range of the DAC output but looks alright. >>>
piglet
The TI chip has a 1 volt feedback setpoint, so I could use a 1.2v
bandgap for the DAC reference. The resulting DAC range might make the
output go 0 to 48 volts or some such, and we'd calibrate the exact
limits.
The TI has an enable pin too. We could set up the DACs for zero out
and then enable.
One issue with a buck switcher is that it works in both directions, so
we can possibly pump load power uphill into our 48 volt supply. That
leads to an ultraviolet catastrophe doom loop, so we would disable the
switcher of we sense it doing that. That logic will be tricky.
Current sense metrology might be one way?
piglet
The current sense, using the shunt, can be used to detect reverse
power and do something.
One complication is startup. Suppose we want to use this supply to
charge a battery. With our supply disabled or set low, there's a stiff
24 volts at our output. How can we start charging it?
On Wed, 1 Nov 2023 08:19:32 -0700 (PDT), Anthony William Sloman <bill....@ieee.org> wrote:7MHz) got me huge spikes. A 1uH ferrite bead in series (out of the Wurth range, good for about 3A) tamed the spikes back to merely big.
On Wednesday, November 1, 2023 at 11:59:33?AM UTC+11, John Larkin wrote:
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into LT Spice. One of my guys can run the TI simulator, so I'll let him tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the current shunt measurement.
I ran it. It looked sort of sensible, until I looked at L1 which hasn't got an parallel capacitance at all. I put in 1pF - which would be low (series resonance at 23MHz) and got big switching spikes. A more realistic 10pF (series resonant at about
Replacing L1 with four 12uH Wurth beads in series gave even smaller switching spikes
It pays to use realistic models in LTSpice. If John had worked out what he was going to use for L1 the manufacturer's data sheet should have given him the self-resonant frequency and the parallel capacitance.
You were doing great until you switched to insult mode. You can't help yourself.
On Wednesday, November 1, 2023 at 8:57:05?AM UTC-7, John Larkin wrote:
On Wed, 1 Nov 2023 15:15:15 +0000, piglet <erichp...@hotmail.com>
wrote:
On 01/11/2023 14:43, John Larkin wrote:The current sense, using the shunt, can be used to detect reverse
On Wed, 1 Nov 2023 11:03:34 +0000, piglet <erichp...@hotmail.com>
wrote:
On 01/11/2023 12:58 am, John Larkin wrote:
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into
LT Spice. One of my guys can run the TI simulator, so I'll let him
tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the
current shunt measurement.
Version 4
SHEET 1 1872 756
WIRE 96 -112 16 -112
WIRE 192 -112 96 -112
WIRE 368 -112 192 -112
WIRE 16 -48 16 -112
WIRE 368 -48 368 -112
WIRE 192 0 192 -112
WIRE 224 0 192 0
WIRE 16 80 16 32
WIRE 656 192 512 192
WIRE 848 192 736 192
WIRE 976 192 848 192
WIRE 1040 192 976 192
WIRE 1104 192 1040 192
WIRE 1168 192 1104 192
WIRE 1312 192 1248 192
WIRE 1376 192 1312 192
WIRE 1520 192 1456 192
WIRE 1648 192 1520 192
WIRE 1712 192 1648 192
WIRE 1776 192 1712 192
WIRE 976 208 976 192
WIRE 1648 256 1648 192
WIRE 1104 272 1104 192
WIRE 1312 272 1312 192
WIRE 1520 272 1520 192
WIRE 96 288 16 288
WIRE 224 288 160 288
WIRE 688 288 512 288
WIRE 1776 288 1776 192
WIRE 976 304 976 272
WIRE 848 320 848 192
WIRE 16 384 16 288
WIRE 96 384 16 384
WIRE 224 384 176 384
WIRE 560 384 512 384
WIRE 976 416 976 384
WIRE 1104 416 1104 336
WIRE 1312 416 1312 336
WIRE 1520 416 1520 336
WIRE 1648 416 1648 336
WIRE 1776 416 1776 352
WIRE 688 432 688 288
WIRE 736 432 688 432
WIRE 848 432 848 384
WIRE 848 432 800 432
WIRE 16 448 16 384
WIRE 560 448 560 384
WIRE 384 560 320 560
WIRE 560 560 464 560
WIRE 688 560 688 432
WIRE 688 560 640 560
WIRE 736 560 688 560
WIRE 848 560 848 432
WIRE 848 560 816 560
WIRE 944 560 848 560
WIRE 1072 560 1024 560
WIRE 1104 560 1072 560
WIRE 320 624 320 560
FLAG 16 80 0
FLAG 976 416 0
FLAG 1648 416 0
FLAG 1712 192 OUT
FLAG 96 -112 IN
FLAG 320 624 0
FLAG 1104 416 0
FLAG 16 448 0
FLAG 560 448 0
FLAG 1520 416 0
FLAG 1776 416 0
FLAG 1312 416 0
FLAG 1040 192 MID
FLAG 1072 560 OUT
SYMBOL res 192 368 R90
WINDOW 0 59 55 VBottom 2
WINDOW 3 62 57 VTop 2
SYMATTR InstName R1
SYMATTR Value 150K
SYMBOL cap 160 272 R90
WINDOW 0 -37 31 VBottom 2
WINDOW 3 -31 28 VTop 2
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL voltage 16 -64 R0
WINDOW 0 30 95 Left 2
WINDOW 3 29 122 Left 2
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL res 832 544 R90
WINDOW 0 -40 62 VBottom 2
WINDOW 3 -32 57 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 656 544 R90
WINDOW 0 -37 59 VBottom 2
WINDOW 3 -31 59 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL cap 800 416 R90
WINDOW 0 -34 36 VBottom 2
WINDOW 3 -30 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 4n
SYMBOL res 1632 240 R0
WINDOW 0 42 52 Left 2
WINDOW 3 53 81 Left 2
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL LT8609S 368 192 R0
SYMATTR InstName U1
SYMBOL cap 960 208 R0
WINDOW 3 49 47 Left 2
WINDOW 0 57 23 Left 2
SYMATTR Value 56µ
SYMATTR SpiceLine Rser=2m
SYMATTR InstName C2
SYMBOL ind 640 208 R270
WINDOW 0 77 58 VTop 2
WINDOW 3 68 60 VBottom 2
SYMATTR InstName L1
SYMATTR Value 47µ
SYMATTR SpiceLine Rser=37m
SYMBOL voltage 480 560 R90
WINDOW 0 40 -2 VBottom 2
WINDOW 3 45 54 VTop 2
SYMATTR InstName V2
SYMATTR Value 0.553
SYMBOL res 960 288 R0
WINDOW 0 48 42 Left 2
WINDOW 3 56 65 Left 2
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL cap 1088 272 R0
WINDOW 0 47 22 Left 2
WINDOW 3 44 48 Left 2
SYMATTR InstName C3
SYMATTR Value 10µ
SYMBOL res 1360 208 R270
WINDOW 0 70 54 VTop 2
WINDOW 3 62 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 0.1
SYMBOL cap 1504 272 R0
WINDOW 0 56 19 Left 2
WINDOW 3 53 47 Left 2
SYMATTR InstName C4
SYMATTR Value 56µ
SYMBOL cap 1760 288 R0
WINDOW 0 55 4 Left 2
WINDOW 3 58 34 Left 2
SYMATTR InstName Cload
SYMATTR Value 100µ
SYMBOL res 1152 208 R270
WINDOW 0 72 60 VTop 2
WINDOW 3 66 63 VBottom 2
SYMATTR InstName R6
SYMATTR Value 0.5
SYMBOL schottky 1328 336 R180
WINDOW 0 -47 -3 Left 2
WINDOW 3 -123 -33 Left 2
SYMATTR InstName D1
SYMATTR Value RB095T-90
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 1040 544 R90
WINDOW 0 -37 58 VBottom 2
WINDOW 3 -30 59 VTop 2
SYMATTR InstName R7
SYMATTR Value 1K
SYMBOL cap 832 320 R0
WINDOW 0 48 27 Left 2
WINDOW 3 50 57 Left 2
SYMATTR InstName C6
SYMATTR Value 2µ
TEXT 808 88 Left 2 !.tran 0 10m 0 20n startup
TEXT 1384 224 Left 2 ;polyfuse
TEXT 840 16 Left 2 ;P943 Power Supply
TEXT 856 48 Left 2 ;JL Oct 31 2023
TEXT 528 56 Left 2 ;<< TI LMR38010
TEXT 536 272 Left 2 ;0.774
TEXT 1184 224 Left 2 ;shunt
TEXT 408 504 Left 2
TEXT 96 472 Left 2 ;300 KHz
It uses a rather compressed range of the DAC output but looks alright. >> >>>
piglet
The TI chip has a 1 volt feedback setpoint, so I could use a 1.2v
bandgap for the DAC reference. The resulting DAC range might make the
output go 0 to 48 volts or some such, and we'd calibrate the exact
limits.
The TI has an enable pin too. We could set up the DACs for zero out
and then enable.
One issue with a buck switcher is that it works in both directions, so
we can possibly pump load power uphill into our 48 volt supply. That
leads to an ultraviolet catastrophe doom loop, so we would disable the
switcher of we sense it doing that. That logic will be tricky.
Current sense metrology might be one way?
piglet
power and do something.
One complication is startup. Suppose we want to use this supply to
charge a battery. With our supply disabled or set low, there's a stiff
24 volts at our output. How can we start charging it?
How about a diode to the battery? It's good to protect reverse connection anyway.
On Thursday, November 2, 2023 at 3:01:55?AM UTC+11, John Larkin wrote:7MHz) got me huge spikes. A 1uH ferrite bead in series (out of the Wurth range, good for about 3A) tamed the spikes back to merely big.
On Wed, 1 Nov 2023 08:19:32 -0700 (PDT), Anthony William Sloman
<bill....@ieee.org> wrote:
On Wednesday, November 1, 2023 at 11:59:33?AM UTC+11, John Larkin wrote:
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into LT Spice. One of my guys can run the TI simulator, so I'll let him tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the current shunt measurement.
I ran it. It looked sort of sensible, until I looked at L1 which hasn't got an parallel capacitance at all. I put in 1pF - which would be low (series resonance at 23MHz) and got big switching spikes. A more realistic 10pF (series resonant at about
oscillator" tussle years ago, and didn't seem to feel insulted when I pointed it out.
Replacing L1 with four 12uH Wurth beads in series gave even smaller switching spikes
It pays to use realistic models in LTSpice. If John had worked out what he was going to use for L1 the manufacturer's data sheet should have given him the self-resonant frequency and the parallel capacitance.
You were doing great until you switched to insult mode. You can't help yourself.
i hit insult mode in the first line " until I looked at L1 which hasn't got an parallel capacitance at all".
It's not actually an insulting observation - simply a statement of fact. You should know better. This isn't the first time you've made this mistake and I've pointed it out before. John Field's made exactly the same mistake in our "low-power 100kHz
If you want to feel insulted less often, make fewer minor errors.
I was rather hoping you'd worry about the extra dissipation in the LT8609S generated by the switching spikes. but you don't seem to have thought about that either.
On Wed, 1 Nov 2023 19:50:11 -0700 (PDT), Anthony William Sloman <bill....@ieee.org> wrote:7MHz) got me huge spikes. A 1uH ferrite bead in series (out of the Wurth range, good for about 3A) tamed the spikes back to merely big.
On Thursday, November 2, 2023 at 3:01:55?AM UTC+11, John Larkin wrote:
On Wed, 1 Nov 2023 08:19:32 -0700 (PDT), Anthony William Sloman
<bill....@ieee.org> wrote:
On Wednesday, November 1, 2023 at 11:59:33?AM UTC+11, John Larkin wrote: >> >
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into LT Spice. One of my guys can run the TI simulator, so I'll let him tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the current shunt measurement.
I ran it. It looked sort of sensible, until I looked at L1 which hasn't got an parallel capacitance at all. I put in 1pF - which would be low (series resonance at 23MHz) and got big switching spikes. A more realistic 10pF (series resonant at about
oscillator" tussle years ago, and didn't seem to feel insulted when I pointed it out.
Replacing L1 with four 12uH Wurth beads in series gave even smaller switching spikes
It pays to use realistic models in LTSpice. If John had worked out what he was going to use for L1 the manufacturer's data sheet should have given him the self-resonant frequency and the parallel capacitance.
You were doing great until you switched to insult mode. You can't help yourself.
i hit insult mode in the first line " until I looked at L1 which hasn't got an parallel capacitance at all".
It's not actually an insulting observation - simply a statement of fact. You should know better. This isn't the first time you've made this mistake and I've pointed it out before. John Field's made exactly the same mistake in our "low-power 100kHz
If you want to feel insulted less often, make fewer minor errors.
I was rather hoping you'd worry about the extra dissipation in the LT8609S generated by the switching spikes. but you don't seem to have thought about that either.
Bizarre. LT Spice has macromodel test fixtures for their LTC and ADP switcher chips. The inductors sometimes include ESR but no shunt capacitance. Check for yourself.
I've simulated and released to manufacturing maybe 30 various switchers in the last few years and never bothered with inductor parasitic capacitance. There's not enough capacitance in the power inductors to matter.
Do some math. One power inductor that I use, 22 uH 2 amp Coilcraft, has 2.4 pF shunt capacitance. The PCB capacitance of a DPAK is more than that.
How many switchers have you built lately?
On Thursday, November 2, 2023 at 2:36:05?PM UTC+11, John Larkin wrote:7MHz) got me huge spikes. A 1uH ferrite bead in series (out of the Wurth range, good for about 3A) tamed the spikes back to merely big.
On Wed, 1 Nov 2023 19:50:11 -0700 (PDT), Anthony William Sloman
<bill....@ieee.org> wrote:
On Thursday, November 2, 2023 at 3:01:55?AM UTC+11, John Larkin wrote:
On Wed, 1 Nov 2023 08:19:32 -0700 (PDT), Anthony William Sloman
<bill....@ieee.org> wrote:
On Wednesday, November 1, 2023 at 11:59:33?AM UTC+11, John Larkin wrote: >> >> >
This is a DAC-programmed power supply, 48v in and 0-36 out maybe.
I want to use the TI switcher, but I don't know how to wedge it into LT Spice. One of my guys can run the TI simulator, so I'll let him tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the current shunt measurement.
I ran it. It looked sort of sensible, until I looked at L1 which hasn't got an parallel capacitance at all. I put in 1pF - which would be low (series resonance at 23MHz) and got big switching spikes. A more realistic 10pF (series resonant at about
oscillator" tussle years ago, and didn't seem to feel insulted when I pointed it out.
Replacing L1 with four 12uH Wurth beads in series gave even smaller switching spikes
It pays to use realistic models in LTSpice. If John had worked out what he was going to use for L1 the manufacturer's data sheet should have given him the self-resonant frequency and the parallel capacitance.
You were doing great until you switched to insult mode. You can't help yourself.
i hit insult mode in the first line " until I looked at L1 which hasn't got an parallel capacitance at all".
It's not actually an insulting observation - simply a statement of fact. You should know better. This isn't the first time you've made this mistake and I've pointed it out before. John Field's made exactly the same mistake in our "low-power 100kHz
the maximum output currents that the device can deliver, you can see why marketing wouldn't be keen to see that mistake corrected,
If you want to feel insulted less often, make fewer minor errors.
I was rather hoping you'd worry about the extra dissipation in the LT8609S generated by the switching spikes. but you don't seem to have thought about that either.
Bizarre. LT Spice has macromodel test fixtures for their LTC and ADP switcher chips. The inductors sometimes include ESR but no shunt capacitance. Check for yourself.
I'm happy to take your word for it. It just means that the people who set up the test fixtures made the same mistake that you did.
Since the switching spikes that appear when you put a realistic parallel capactiance into your inductor model hit the switches inside the LT8609S just when they are turning on and off, they signicantly increase the dissipation in the switches reducing
I've simulated and released to manufacturing maybe 30 various switchers in the last few years and never bothered with inductor parasitic capacitance. There's not enough capacitance in the power inductors to matter.
There hasn't been enough so far. Getting stuff wrong and getting away with it means that you have been over-doing the safety margins. It may be prudent design but it is also extravagant design.
Do some math. One power inductor that I use, 22 uH 2 amp Coilcraft, has 2.4 pF shunt capacitance. The PCB capacitance of a DPAK is more than that.
So what? The parallel capacitance of the inductor has to be charged or discharged whenever you switch it's input from rail to rail, and you do that a lot.
How many switchers have you built lately?
None in recent years. The most recent is probably the one in the 1993 milli-degree thermostat. Figure 8 from that paper shows a bunch of 1.3uH ferrite beads put in to cope with exactly that problem. Meas. Sci. Technol. 7 (1996) 1653–1664.
On Wed, 1 Nov 2023 21:54:25 -0700 (PDT), Anthony William Sloman <bill....@ieee.org> wrote:about 7MHz) got me huge spikes. A 1uH ferrite bead in series (out of the Wurth range, good for about 3A) tamed the spikes back to merely big.
On Thursday, November 2, 2023 at 2:36:05?PM UTC+11, John Larkin wrote:
On Wed, 1 Nov 2023 19:50:11 -0700 (PDT), Anthony William Sloman
<bill....@ieee.org> wrote:
On Thursday, November 2, 2023 at 3:01:55?AM UTC+11, John Larkin wrote: >> >> On Wed, 1 Nov 2023 08:19:32 -0700 (PDT), Anthony William Sloman
<bill....@ieee.org> wrote:
On Wednesday, November 1, 2023 at 11:59:33?AM UTC+11, John Larkin wrote:
This is a DAC-programmed power supply, 48v in and 0-36 out maybe. >> >> >>
I want to use the TI switcher, but I don't know how to wedge it into LT Spice. One of my guys can run the TI simulator, so I'll let him tune it with the TI part.
We might do programmable current limiting in an FPGA, based on the current shunt measurement.
I ran it. It looked sort of sensible, until I looked at L1 which hasn't got an parallel capacitance at all. I put in 1pF - which would be low (series resonance at 23MHz) and got big switching spikes. A more realistic 10pF (series resonant at
oscillator" tussle years ago, and didn't seem to feel insulted when I pointed it out.
Replacing L1 with four 12uH Wurth beads in series gave even smaller switching spikes
It pays to use realistic models in LTSpice. If John had worked out what he was going to use for L1 the manufacturer's data sheet should have given him the self-resonant frequency and the parallel capacitance.
You were doing great until you switched to insult mode. You can't help yourself.
i hit insult mode in the first line " until I looked at L1 which hasn't got an parallel capacitance at all".
It's not actually an insulting observation - simply a statement of fact. You should know better. This isn't the first time you've made this mistake and I've pointed it out before. John Field's made exactly the same mistake in our "low-power 100kHz
reducing the maximum output currents that the device can deliver, you can see why marketing wouldn't be keen to see that mistake corrected,
If you want to feel insulted less often, make fewer minor errors.
I was rather hoping you'd worry about the extra dissipation in the LT8609S generated by the switching spikes. but you don't seem to have thought about that either.
Bizarre. LT Spice has macromodel test fixtures for their LTC and ADP switcher chips. The inductors sometimes include ESR but no shunt capacitance. Check for yourself.
I'm happy to take your word for it. It just means that the people who set up the test fixtures made the same mistake that you did.
Since the switching spikes that appear when you put a realistic parallel capactiance into your inductor model hit the switches inside the LT8609S just when they are turning on and off, they significantly increase the dissipation in the switches
I've simulated and released to manufacturing maybe 30 various switchers in the last few years and never bothered with inductor parasitic capacitance. There's not enough capacitance in the power inductors to matter.
There hasn't been enough capacitance so far. Getting stuff wrong and getting away with it means that you have been over-doing the safety margins. It may be prudent design but it is also extravagant design.
Do some math. One power inductor that I use, 22 uH 2 amp Coilcraft, has 2.4 pF shunt capacitance. The PCB capacitance of a DPAK is more than that.
So what? The parallel capacitance of the inductor has to be charged or discharged whenever you switch it's input from rail to rail, and you do that a lot.
How many switchers have you built lately?
None in recent years. The most recent is probably the one in the 1993 milli-degree thermostat. Figure 8 from that paper shows a bunch of 1.3uH ferrite beads put in to cope with exactly that problem. Meas. Sci. Technol. 7 (1996) 1653–1664.
That stirred-water bath seems to be the highlight of your life.
Your main motivation is to be nasty.
That overpowers your common sense and basic numeracy and ability to learn.
That's a too-common human behavior, letting emotion overpower reason.
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