• Re: LTSpice resistive divider

    From Piotr Wyderski@21:1/5 to Piotr Wyderski on Thu Jun 16 18:49:13 2022
    Piotr Wyderski wrote:

    https://i.postimg.cc/SxPYBV2c/spice.png

    Reinstalling Spice doesn't help either. Would it be the new physics
    they've been looking for at CERN recently?

    Best regards, Piotr

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Piotr Wyderski@21:1/5 to All on Thu Jun 16 18:34:36 2022
    Hi,

    what has recently happened to my Spice? Below is a simple resistor
    divider and this is the R2 voltage:

    https://i.postimg.cc/SxPYBV2c/spice.png

    Switching between solvers doesn't make any difference.

    Best regards, Piotr

    Version 4
    SHEET 1 880 680
    WIRE 208 32 96 32
    WIRE 368 32 288 32
    WIRE 368 48 368 32
    WIRE 96 80 96 32
    WIRE 96 176 96 160
    WIRE 368 176 368 128
    FLAG 96 176 0
    FLAG 368 176 0
    SYMBOL voltage 96 64 R0
    WINDOW 123 0 0 Left 0
    WINDOW 39 0 0 Left 0
    SYMATTR InstName V1
    SYMATTR Value SINE(0 320 50)
    SYMBOL res 352 32 R0
    SYMATTR InstName R1
    SYMATTR Value 64
    SYMBOL res 304 16 R90
    WINDOW 0 0 56 VBottom 2
    WINDOW 3 32 56 VTop 2
    SYMATTR InstName R2
    SYMATTR Value 10m
    TEXT 64 200 Left 2 !.tran 1

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Ricky@21:1/5 to Piotr Wyderski on Thu Jun 16 10:02:34 2022
    On Thursday, June 16, 2022 at 12:49:32 PM UTC-4, Piotr Wyderski wrote:
    Piotr Wyderski wrote:

    https://i.postimg.cc/SxPYBV2c/spice.png

    Reinstalling Spice doesn't help either. Would it be the new physics
    they've been looking for at CERN recently?

    I entered the schematic from scratch and get the same thing. I suspect the solder joints. Try touching them up with a hot iron and lots of flux.

    --

    Rick C.

    - Get 1,000 miles of free Supercharging
    - Tesla referral code - https://ts.la/richard11209

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Piotr Wyderski@21:1/5 to Phil Hobbs on Thu Jun 16 19:45:02 2022
    Phil Hobbs wrote:

    Thanks for the heads-up, Piotr.

    No problem, albeit I am shocked that you both can replicate it. I was
    sure it was due to my messing up with the Control Panel parameters. Now
    I am getting worried: how many planes above my head were simulated with
    this tool? ;-)

    It only seems to do it with the "modified trap" integrator--switching to plain trapezoid or Gear fixes it, it looks like.

    So does tran 40m instead of tran 1 with the default settings.

    That's a super good test case for a bug report!

    Reported.

    Best regards, Piotr

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From John Larkin@21:1/5 to pcdhSpamMeSenseless@electrooptical. on Thu Jun 16 10:49:26 2022
    On Thu, 16 Jun 2022 13:21:01 -0400, Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote:

    Ricky wrote:
    On Thursday, June 16, 2022 at 12:49:32 PM UTC-4, Piotr Wyderski wrote:
    Piotr Wyderski wrote:

    https://i.postimg.cc/SxPYBV2c/spice.png

    Reinstalling Spice doesn't help either. Would it be the new physics
    they've been looking for at CERN recently?

    I entered the schematic from scratch and get the same thing. I suspect the solder joints. Try touching them up with a hot iron and lots of flux.


    Thanks for the heads-up, Piotr. It does it for me too, at least in XVII.

    It only seems to do it with the "modified trap" integrator--switching to >plain trapezoid or Gear fixes it, it looks like.

    None of the tolerances I fiddled with did anything.

    It works fine in LTspice IV.

    That's a super good test case for a bug report!

    (JT, were he here to see it, would be crowing about how much better
    Original Crispy PSPICE was. RIP.)

    Cheers

    Phil Hobbs

    It looks OK with a smaller time step.

    --

    If a man will begin with certainties, he shall end with doubts,
    but if he will be content to begin with doubts he shall end in certainties. Francis Bacon

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Phil Hobbs@21:1/5 to Ricky on Thu Jun 16 13:21:01 2022
    Ricky wrote:
    On Thursday, June 16, 2022 at 12:49:32 PM UTC-4, Piotr Wyderski wrote:
    Piotr Wyderski wrote:

    https://i.postimg.cc/SxPYBV2c/spice.png

    Reinstalling Spice doesn't help either. Would it be the new physics
    they've been looking for at CERN recently?

    I entered the schematic from scratch and get the same thing. I suspect the solder joints. Try touching them up with a hot iron and lots of flux.


    Thanks for the heads-up, Piotr. It does it for me too, at least in XVII.

    It only seems to do it with the "modified trap" integrator--switching to
    plain trapezoid or Gear fixes it, it looks like.

    None of the tolerances I fiddled with did anything.

    It works fine in LTspice IV.

    That's a super good test case for a bug report!

    (JT, were he here to see it, would be crowing about how much better
    Original Crispy PSPICE was. RIP.)

    Cheers

    Phil Hobbs

    --
    Dr Philip C D Hobbs
    Principal Consultant
    ElectroOptical Innovations LLC / Hobbs ElectroOptics
    Optics, Electro-optics, Photonics, Analog Electronics
    Briarcliff Manor NY 10510

    http://electrooptical.net
    http://hobbs-eo.com

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From piglet@21:1/5 to Piotr Wyderski on Thu Jun 16 19:51:14 2022
    On 16/06/2022 6:45 pm, Piotr Wyderski wrote:

    So does tran 40m instead of tran 1 with the default settings.


    Not quite, with the default "modified trap" setting using 40ms tran does
    indeed give the proper waveshape but the voltages are still wrong!

    piglet

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Piotr Wyderski@21:1/5 to Piotr Wyderski on Thu Jun 16 20:23:04 2022
    Piotr Wyderski wrote:

    Reported.

    Or not. Apparently, my location is essential. How would our beloved P.
    Allison respond to that?

    Hi Piotr,
    For technical support, ADI requests additional contact information.
    Please reply to this email with your:

    Company or University Email address
    Phone number
    Name of your Company or University
    Office Address, City, State, Zip Code

    Regards,
    ADI Tech Support

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Ricky@21:1/5 to Piotr Wyderski on Thu Jun 16 12:47:32 2022
    On Thursday, June 16, 2022 at 2:23:23 PM UTC-4, Piotr Wyderski wrote:
    Piotr Wyderski wrote:

    Reported.

    Or not. Apparently, my location is essential. How would our beloved P. Allison respond to that?

    Hi Piotr,
    For technical support, ADI requests additional contact information.
    Please reply to this email with your:

    Company or University Email address
    Phone number
    Name of your Company or University
    Office Address, City, State, Zip Code

    Regards,
    ADI Tech Support

    Their way to filtering out the rif-raff, obviously. The "company" email address only means no Yahoo or Gmail accounts, even if that's what you actually use.

    There's an ADI part I want to redesign out because of price. The only alternative I've found so far is a Maxim part that can be even higher priced... and is now an ADI part. lol

    Low resistance, high voltage analog switch. Powered from ±12V and around 2-3 ohms, quad in a TSSOP-16. Being able to get the Maxim part was hugely important when the ADI part was not available.

    --

    Rick C.

    + Get 1,000 miles of free Supercharging
    + Tesla referral code - https://ts.la/richard11209

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Phil Hobbs@21:1/5 to Piotr Wyderski on Thu Jun 16 16:52:21 2022
    Piotr Wyderski wrote:
    Piotr Wyderski wrote:

    Reported.

    Or not. Apparently, my location is essential. How would our beloved P. Allison respond to that?

    Hi Piotr,
    For technical support, ADI requests additional contact information.
    Please reply to this email with your:

    Company or University Email address
    Phone number
    Name of your Company or University
    Office Address, City, State, Zip Code

    Regards,
    ADI Tech Support


    Well, it's nice for them to be able to phone you up for clarification.

    An address along the lines of "1600 Pennsylvania Ave NW, Washington DC
    20500" is always good. ;)

    Cheers

    Phil Hobbs

    --
    Dr Philip C D Hobbs
    Principal Consultant
    ElectroOptical Innovations LLC / Hobbs ElectroOptics
    Optics, Electro-optics, Photonics, Analog Electronics
    Briarcliff Manor NY 10510

    http://electrooptical.net
    http://hobbs-eo.com

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Chris@21:1/5 to Piotr Wyderski on Thu Jun 16 16:08:45 2022
    On Friday, 17 June 2022 at 03:45:21 UTC+10, Piotr Wyderski wrote:
    Phil Hobbs wrote:

    Thanks for the heads-up, Piotr.
    No problem, albeit I am shocked that you both can replicate it. I was
    sure it was due to my messing up with the Control Panel parameters. Now
    I am getting worried: how many planes above my head were simulated with
    this tool? ;-)
    It only seems to do it with the "modified trap" integrator--switching to plain trapezoid or Gear fixes it, it looks like.
    So does tran 40m instead of tran 1 with the default settings.
    That's a super good test case for a bug report!
    Reported.

    Best regards, Piotr

    FWIW it worked perfectly for me on all PSpice integration methods.

    To be fair I had updated (Tools->Sync Release) a week ago...

    --
    Cheers,
    Chris.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From qrk@21:1/5 to bombald@protonmail.com on Thu Jun 16 21:30:59 2022
    This bug showed up after May 2019 in version XVII.
    It is discussed in the LTSpice group. https://groups.io/g/LTspice/topic/78178224#126082

    On Thu, 16 Jun 2022 18:34:36 +0200, Piotr Wyderski
    <bombald@protonmail.com> wrote:

    Hi,

    what has recently happened to my Spice? Below is a simple resistor
    divider and this is the R2 voltage:

    https://i.postimg.cc/SxPYBV2c/spice.png

    Switching between solvers doesn't make any difference.

    Best regards, Piotr

    Version 4
    SHEET 1 880 680
    WIRE 208 32 96 32
    WIRE 368 32 288 32
    WIRE 368 48 368 32
    WIRE 96 80 96 32
    WIRE 96 176 96 160
    WIRE 368 176 368 128
    FLAG 96 176 0
    FLAG 368 176 0
    SYMBOL voltage 96 64 R0
    WINDOW 123 0 0 Left 0
    WINDOW 39 0 0 Left 0
    SYMATTR InstName V1
    SYMATTR Value SINE(0 320 50)
    SYMBOL res 352 32 R0
    SYMATTR InstName R1
    SYMATTR Value 64
    SYMBOL res 304 16 R90
    WINDOW 0 0 56 VBottom 2
    WINDOW 3 32 56 VTop 2
    SYMATTR InstName R2
    SYMATTR Value 10m
    TEXT 64 200 Left 2 !.tran 1

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Andy I@21:1/5 to All on Wed Aug 17 21:30:39 2022
    This is an old message thread, but I want to let you all know what the "problem" was.

    What you are seeing is the effect of LTspice's Modified Trap integration method, and a little more. Modified Trap is identical to regular Trap except that an additional nonlinear filtering step is applied to waveforms before saving them to disk (it
    doesn't affect the simulation itself). It is described on the LTspice Help page for "Integration Methods".

    Now, a change was made to LTspice XVII in 2020(?) to disable this nonlinear filtering on only certain signals - namely those that come directly from things like voltage sources, because they should be immune to "Trap Ringing", which was the reason for
    the nonlinear filter. I don't know why they changed it, but I guess maybe customers complained that their ideal voltage sources were slightly "off". That change fixed it.

    All good so far. But the problem comes when you directly compare nearly identical signals where one is ModTrap-filtered and the other is not. That is the case in your circuit with the signals on the two ends of R2. R2 is much smaller than R1 so the
    two voltages on R2's ends are large but nearly equal (millivolts compared to hundreds of volts). But - and here's the key thing - when saved to disk with Modified Trap selected, the right end of R2 has the ModTrap nonlinear filter, and the left end does
    not. Now, depending on the timestep, this can cause the voltage between the ends of R2 to look distorted on account of that nonlinear filter that was applied differently to the two signals. If both signals had Modified Trap filtering, they would look
    fine because the nonlinear filter would be applied to both signals. Also, when looking at any signal by itself (not compared with another), it looks correct because the effect of the nonlinear filter is usually negligible unless there is Trap Ringing.
    But because you are looking at the small difference between two large signals, you see something that shouldn't be there.

    There are multiple ways to eliminate it:

    - Make the timestep smaller. Add a Maximum Timestep to the .tran command.

    - Don't use Modified Trap. Select either (regular) Trapezoidal or Gear. (Note that you can't force regular Trap by way of ".OPTIONS METHOD=TRAP". That just picks either Trap or Modified Trap depending on which one was selected in the Control Panel.)

    - Add a dummy resistor from the top of V1 to nowhere. Give it any value other than 0. There is exactly zero current through it, so no voltage drop across it. But LTspice applies the ModTrap's nonlinear filter to the floating end of that added
    resistor, whereas the driven end (connected to V1) doesn't have the nonlinear filter. Now if you probe the voltage between that floating end, and the right end of R2, the plotted waveform looks correct again.

    Regards,
    Andy

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Phil Hobbs@21:1/5 to All on Thu Aug 18 12:32:01 2022
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    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From John Larkin@21:1/5 to All on Thu Aug 18 14:24:03 2022
    On Wed, 17 Aug 2022 21:30:39 -0700 (PDT), Andy I <ai.egrps@gmail.com>
    wrote:

    This is an old message thread, but I want to let you all know what the "problem" was.

    What you are seeing is the effect of LTspice's Modified Trap integration method, and a little more. Modified Trap is identical to regular Trap except that an additional nonlinear filtering step is applied to waveforms before saving them to disk (it
    doesn't affect the simulation itself). It is described on the LTspice Help page for "Integration Methods".

    Now, a change was made to LTspice XVII in 2020(?) to disable this nonlinear filtering on only certain signals - namely those that come directly from things like voltage sources, because they should be immune to "Trap Ringing", which was the reason for
    the nonlinear filter. I don't know why they changed it, but I guess maybe customers complained that their ideal voltage sources were slightly "off". That change fixed it.

    All good so far. But the problem comes when you directly compare nearly identical signals where one is ModTrap-filtered and the other is not. That is the case in your circuit with the signals on the two ends of R2. R2 is much smaller than R1 so the
    two voltages on R2's ends are large but nearly equal (millivolts compared to hundreds of volts). But - and here's the key thing - when saved to disk with Modified Trap selected, the right end of R2 has the ModTrap nonlinear filter, and the left end does
    not. Now, depending on the timestep, this can cause the voltage between the ends of R2 to look distorted on account of that nonlinear filter that was applied differently to the two signals. If both signals had Modified Trap filtering, they would look
    fine because the nonlinear filter would be applied to both signals. Also, when looking at any signal by itself (not compared with another), it looks correct because the effect of the nonlinear filter is usually negligible unless there
    is
    Trap Ringing. But because you are looking at the small difference between two large signals, you see something that shouldn't be there.

    There are multiple ways to eliminate it:

    - Make the timestep smaller. Add a Maximum Timestep to the .tran command.

    - Don't use Modified Trap. Select either (regular) Trapezoidal or Gear. (Note that you can't force regular Trap by way of ".OPTIONS METHOD=TRAP". That just picks either Trap or Modified Trap depending on which one was selected in the Control Panel.)

    - Add a dummy resistor from the top of V1 to nowhere. Give it any value other than 0. There is exactly zero current through it, so no voltage drop across it. But LTspice applies the ModTrap's nonlinear filter to the floating end of that added
    resistor, whereas the driven end (connected to V1) doesn't have the nonlinear filter. Now if you probe the voltage between that floating end, and the right end of R2, the plotted waveform looks correct again.

    Regards,
    Andy

    I love LT Spice except when she lies to me. It's good to always be a
    bit skeptical.

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