#if defined (__i386__) || defined (__x86_64__)
return Val_long (__rdtsc ());
#elif defined (__arm__) || defined (__aarch64__)
return Val_long (read_virtual_count ());
#elif defined(__powerpc64__)
return Val_long (read_cycle_counter ());
#elif defined(__riscv) && (64 == __riscv_xlen)
return Val_long (rdcycle64 ());
#elif defined (__s390x__)
return Val_long (getticks ());
#else
#error ("No known cycle-counting instruction.")
#endif
Dear MIPS porters,
I am debugging ocaml-mirage-crypto build on mipsel.
It uses the following code:
#if defined (__i386__) || defined (__x86_64__)
return Val_long (__rdtsc ());
#elif defined (__arm__) || defined (__aarch64__)
return Val_long (read_virtual_count ());
#elif defined(__powerpc64__)
return Val_long (read_cycle_counter ());
#elif defined(__riscv) && (64 == __riscv_xlen)
return Val_long (rdcycle64 ());
#elif defined (__s390x__)
return Val_long (getticks ());
#else
#error ("No known cycle-counting instruction.")
#endif
I have trouble finding a suitable implementation for this on mipsel.
Would you have a hint?
Salut Stéphane,
On Fri, Dec 3, 2021 at 10:19 AM Stéphane Glondu <glondu@debian.org> wrote:
Dear MIPS porters,
I am debugging ocaml-mirage-crypto build on mipsel.
It uses the following code:
#if defined (__i386__) || defined (__x86_64__)
return Val_long (__rdtsc ());
#elif defined (__arm__) || defined (__aarch64__)
return Val_long (read_virtual_count ());
#elif defined(__powerpc64__)
return Val_long (read_cycle_counter ());
#elif defined(__riscv) && (64 == __riscv_xlen)
return Val_long (rdcycle64 ());
#elif defined (__s390x__)
return Val_long (getticks ());
#else
#error ("No known cycle-counting instruction.")
#endif
I have trouble finding a suitable implementation for this on mipsel.
Would you have a hint?
All I could find is this code (untested):
https://salsa.debian.org/science-team/nfft/-/blob/debian/master/include/cycle.h#L485-507
Hi Stéphane.
MIPS do have a way to access count register from user space.
Unfortunately there is no GCC intrinsic function for it, you may try following inline assembly.
static inline unsigned long get_count() {
unsigned long count;
asm volatile ("rdhwr %[rt], $2" : [rt] "=d" (count));
return count;
}
return Val_long (get_count());
On Sat, Dec 04, 2021 at 12:07:29AM +0000, YANG Jiaxun wrote:
Hi Stphane.
MIPS do have a way to access count register from user space.
Unfortunately there is no GCC intrinsic function for it, you may try following inline assembly.
static inline unsigned long get_count() {
unsigned long count;
asm volatile ("rdhwr %[rt], $2" : [rt] "=d" (count));
return count;
}
return Val_long (get_count());
To be more precise - Not all CPUs have this (Older MIPS I for example
dont) but there is kernel emulation / instruction trapping for it.
MIPS do have a way to access count register from user space.
Unfortunately there is no GCC intrinsic function for it, you may try following inline assembly.
static inline unsigned long get_count() {
unsigned long count;
asm volatile ("rdhwr %[rt], $2" : [rt] "=d" (count));
return count;
}
return Val_long (get_count());
To be more precise - Not all CPUs have this (Older MIPS I for example
dont) but there is kernel emulation / instruction trapping for it.
only for the thread register.
what's the requirement for this cycle count ? Is it about more
fine grained timestamps or really cpu cylces done ?
The purpose is entropy harvesting - the lower 32 bit of mc_cycle_counter are mixed into the RNG (Fortuna). This is done in Lwt and MirageOS systems and called on each entry to the Lwt loop. The requirement is "a value that is hardly predictable andshould be different in each call".
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