• MIPS-specific porting issue

    From =?UTF-8?Q?St=c3=a9phane_Glondu?=@21:1/5 to All on Fri Dec 3 10:20:03 2021
    Dear MIPS porters,

    I am debugging ocaml-mirage-crypto build on mipsel.

    It uses the following code:

    #if defined (__i386__) || defined (__x86_64__)
    return Val_long (__rdtsc ());
    #elif defined (__arm__) || defined (__aarch64__)
    return Val_long (read_virtual_count ());
    #elif defined(__powerpc64__)
    return Val_long (read_cycle_counter ());
    #elif defined(__riscv) && (64 == __riscv_xlen)
    return Val_long (rdcycle64 ());
    #elif defined (__s390x__)
    return Val_long (getticks ());
    #else
    #error ("No known cycle-counting instruction.")
    #endif

    I have trouble finding a suitable implementation for this on mipsel.
    Would you have a hint?


    Cheers,

    --
    Stéphane

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  • From Mathieu Malaterre@21:1/5 to glondu@debian.org on Fri Dec 3 10:40:01 2021
    Salut Stéphane,

    On Fri, Dec 3, 2021 at 10:19 AM Stéphane Glondu <glondu@debian.org> wrote:

    Dear MIPS porters,

    I am debugging ocaml-mirage-crypto build on mipsel.

    It uses the following code:

    #if defined (__i386__) || defined (__x86_64__)
    return Val_long (__rdtsc ());
    #elif defined (__arm__) || defined (__aarch64__)
    return Val_long (read_virtual_count ());
    #elif defined(__powerpc64__)
    return Val_long (read_cycle_counter ());
    #elif defined(__riscv) && (64 == __riscv_xlen)
    return Val_long (rdcycle64 ());
    #elif defined (__s390x__)
    return Val_long (getticks ());
    #else
    #error ("No known cycle-counting instruction.")
    #endif

    I have trouble finding a suitable implementation for this on mipsel.
    Would you have a hint?

    All I could find is this code (untested):

    https://salsa.debian.org/science-team/nfft/-/blob/debian/master/include/cycle.h#L485-507

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  • From YunQiang Su@21:1/5 to All on Sat Dec 4 01:50:01 2021
    FROM:jiaxun yang

    Hi Stéphane.



    MIPS do have a way to access count register from user space.

    Unfortunately there is no GCC intrinsic function for it, you may try
    following inline assembly.



    static inline unsigned long get_count() {

    unsigned long count;

    asm volatile ("rdhwr %[rt], $2" : [rt] "=d" (count));

    return count;

    }



    return Val_long (get_count());



    Thanks.



    - Jiaxun

    Mathieu Malaterre <malat@debian.org> 于 2021年12月3日周五 下午5:34写道:

    Salut Stéphane,

    On Fri, Dec 3, 2021 at 10:19 AM Stéphane Glondu <glondu@debian.org> wrote:

    Dear MIPS porters,

    I am debugging ocaml-mirage-crypto build on mipsel.

    It uses the following code:

    #if defined (__i386__) || defined (__x86_64__)
    return Val_long (__rdtsc ());
    #elif defined (__arm__) || defined (__aarch64__)
    return Val_long (read_virtual_count ());
    #elif defined(__powerpc64__)
    return Val_long (read_cycle_counter ());
    #elif defined(__riscv) && (64 == __riscv_xlen)
    return Val_long (rdcycle64 ());
    #elif defined (__s390x__)
    return Val_long (getticks ());
    #else
    #error ("No known cycle-counting instruction.")
    #endif

    I have trouble finding a suitable implementation for this on mipsel.
    Would you have a hint?

    All I could find is this code (untested):


    https://salsa.debian.org/science-team/nfft/-/blob/debian/master/include/cycle.h#L485-507



    <div dir="auto"><div dir="auto">FROM:jiaxun yang</div><div dir="auto">  </div><div dir="auto">Hi Stéphane.</div><div dir="auto"> </div><div dir="auto"> </div><div dir="auto"> </div><div dir="auto">MIPS do have a way to access count register from
    user space.</div><div dir="auto"> </div><div dir="auto">Unfortunately there is no GCC intrinsic function for it, you may try following inline assembly.</div><div dir="auto"> </div><div dir="auto"> </div><div dir="auto"> </div><div dir="auto">static
    inline unsigned long get_count() {</div><div dir="auto"> </div><div dir="auto">    unsigned long count;</div><div dir="auto"> </div><div dir="auto">    asm volatile (&quot;rdhwr %[rt], $2&quot; : [rt] &quot;=d&quot; (count));</div><div dir="auto"> 
    </div><div dir="auto">    return count;</div><div dir="auto"> </div><div dir="auto">}</div><div dir="auto"> </div><div dir="auto"> </div><div dir="auto"> </div><div dir="auto">return Val_long (get_count());</div><div dir="auto"> </div><div dir="
    auto"> </div><div dir="auto"> </div><div dir="auto">Thanks.</div><div dir="auto"> </div><div dir="auto"> </div><div dir="auto"> </div><div dir="auto">- Jiaxun</div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">Mathieu
    Malaterre &lt;<a href="mailto:malat@debian.org">malat@debian.org</a>&gt; 于 2021年12月3日周五 下午5:34写道:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Salut Stéphane,<br>

    On Fri, Dec 3, 2021 at 10:19 AM Stéphane Glondu &lt;<a href="mailto:glondu@debian.org" target="_blank" rel="noreferrer">glondu@debian.org</a>&gt; wrote:<br>
    &gt;<br>
    &gt; Dear MIPS porters,<br>
    &gt;<br>
    &gt; I am debugging ocaml-mirage-crypto build on mipsel.<br>
    &gt;<br>
    &gt; It uses the following code:<br>
    &gt;<br>
    &gt; &gt; #if defined (__i386__) || defined (__x86_64__)<br>
    &gt; &gt;   return Val_long (__rdtsc ());<br>
    &gt; &gt; #elif defined (__arm__) || defined (__aarch64__)<br>
    &gt; &gt;   return Val_long (read_virtual_count ());<br>
    &gt; &gt; #elif defined(__powerpc64__)<br>
    &gt; &gt;   return Val_long (read_cycle_counter ());<br>
    &gt; &gt; #elif defined(__riscv) &amp;&amp; (64 == __riscv_xlen)<br>
    &gt; &gt;   return Val_long (rdcycle64 ());<br>
    &gt; &gt; #elif defined (__s390x__)<br>
    &gt; &gt;   return Val_long (getticks ());<br>
    &gt; &gt; #else<br>
    &gt; &gt; #error (&quot;No known cycle-counting instruction.&quot;)<br>
    &gt; &gt; #endif<br>
    &gt;<br>
    &gt; I have trouble finding a suitable implementation for this on mipsel.<br> &gt; Would you have a hint?<br>

    All I could find is this code (untested):<br>

    <a href="https://salsa.debian.org/science-team/nfft/-/blob/debian/master/include/cycle.h#L485-507" rel="noreferrer noreferrer" target="_blank">https://salsa.debian.org/science-team/nfft/-/blob/debian/master/include/cycle.h#L485-507</a><br>

    </blockquote></div>

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  • From Florian Lohoff@21:1/5 to YANG Jiaxun on Mon Dec 6 10:20:01 2021
    On Sat, Dec 04, 2021 at 12:07:29AM +0000, YANG Jiaxun wrote:
    Hi Stéphane.

    MIPS do have a way to access count register from user space.
    Unfortunately there is no GCC intrinsic function for it, you may try following inline assembly.

    static inline unsigned long get_count() {
    unsigned long count;
    asm volatile ("rdhwr %[rt], $2" : [rt] "=d" (count));
    return count;
    }

    return Val_long (get_count());

    To be more precise - Not all CPUs have this (Older MIPS I for example
    dont) but there is kernel emulation / instruction trapping for it.

    And - I dont think Debian supports MIPS I targets anymore.

    Flo
    --
    Florian Lohoff f@zz.de
    Any sufficiently advanced technology is indistinguishable from magic.

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  • From Thomas Bogendoerfer@21:1/5 to Florian Lohoff on Mon Dec 6 19:30:02 2021
    On Mon, Dec 06, 2021 at 10:01:58AM +0100, Florian Lohoff wrote:
    On Sat, Dec 04, 2021 at 12:07:29AM +0000, YANG Jiaxun wrote:
    Hi Stphane.

    MIPS do have a way to access count register from user space.
    Unfortunately there is no GCC intrinsic function for it, you may try following inline assembly.

    static inline unsigned long get_count() {
    unsigned long count;
    asm volatile ("rdhwr %[rt], $2" : [rt] "=d" (count));
    return count;
    }

    return Val_long (get_count());

    To be more precise - Not all CPUs have this (Older MIPS I for example
    dont) but there is kernel emulation / instruction trapping for it.

    only for the thread register.

    what's the requirement for this cycle count ? Is it about more
    fine grained timestamps or really cpu cylces done ?

    Thomas.

    --
    Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]

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  • From =?UTF-8?Q?St=c3=a9phane_Glondu?=@21:1/5 to All on Mon Dec 20 09:10:01 2021
    Hello,

    Le 06/12/2021 à 17:52, Thomas Bogendoerfer a écrit :
    MIPS do have a way to access count register from user space.
    Unfortunately there is no GCC intrinsic function for it, you may try following inline assembly.

    static inline unsigned long get_count() {
    unsigned long count;
    asm volatile ("rdhwr %[rt], $2" : [rt] "=d" (count));
    return count;
    }

    return Val_long (get_count());

    To be more precise - Not all CPUs have this (Older MIPS I for example
    dont) but there is kernel emulation / instruction trapping for it.

    only for the thread register.

    what's the requirement for this cycle count ? Is it about more
    fine grained timestamps or really cpu cylces done ?

    I've asked your question in
    https://github.com/mirage/mirage-crypto/pull/148 and got a reply:

    The purpose is entropy harvesting - the lower 32 bit of mc_cycle_counter are mixed into the RNG (Fortuna). This is done in Lwt and MirageOS systems and called on each entry to the Lwt loop. The requirement is "a value that is hardly predictable and
    should be different in each call".


    Cheers,

    --
    Stéphane

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