Hi,

Just for nostalgia I've run Mike's rayshade binary (http://transputer.net/sw/sw.asp#RayShade) on a
Win64 box, using Highfield's T4 simulator in T800 mode (https://github.com/pahihu/t4).

The default winecup image is processed in 2576
seconds (a 140MHz T800 ;)

Regards,
pahihu

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Hi Pahihu,

That is very impressive! Maybe you can give some additional information about the hardware of the Win64 box.

Here are my results on a real T805G:
rspy -zm
# Part rt Link0 Link1 Link2 Link3 RAM@cycle
0 T805G120 HOST ... ... ... 512K@1,15872K@2.

iserver -sb main.btl -v -O winecup.bmp <winecup.ray
...
Total CPU time (sec): 1845.88 (1845.88u + 0.00s)
Seconds / ray: 0.0003
Seconds / intersecting ray: 0.0005
Total memory allocated: 10696858 bytes

The run time of Rayshade depends heavily on the speed of the external memory. To take this into account I expanded the internal memory to 512K. Running with only 4K internal and 16M external DDR3 memory is resulting in 3123.12 seconds even with the T805
running at 200MHz.

Anyhow, I'm very happy that a freely available emulator is running at such a high speed. Keep up the good work!

Regards

Claus

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Hi,

The Win64 box uses a dual E5-2698 v4 Xeon @ 2.20GHz.
What is the T805G120 part with external DDR3 memory ? Is it inside an FPGA fabric ?
The performance is quite impressive.

Regards,
pahihu

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Hi Pahihu,

Your guess is correct, it is a design for an FPGA.
The Digilent Genesys2 board provides a fast Kintex FPGA in which the design can run at 160MHz without over-clocking and up to 200MHz with over-clocking the FPGA. The DDR3 RAM on the board is accessed by a the MIG core and I placed a first and a second
level cache between the CPU and the memory core.
I started with the lower cost Arty board which has a DDR3L and offers less performance than the Genesys2 board.
My design can run on a CMOD A7 too, at 90MHz and 512MB five cycle external SRAM. Thus the Transputer might be nice alternative if one refuses to work with a RISC-V :-)

I had a lot of fun with this project over the last two years. I was greatly supported by Gavin who shared his C-code implementation of the FPU with me. Many thanks to Mike and Uwe for their support. They both know the Transputer much better than I do and
have collected all material available.

Regards

Claus

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Hi,

Thank you for the information.
One more question: the FPGA T805G uses the original microcode ROM ?

Regards,
pahihu

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Hi Pahihu,

The design is built in such a way that it can execute the original microcode. Since the original microcode is not optimized in regards to be used with FPGAs LUTs some signals in the microcode and the logic are modified in my design. Think of a multiplexer with many inputs. Inmos had chosen the select lines to be one-hot which fits
very well to their transistor logic but not to the FPGA look-up-table based logic.
To understand how Inmos designed the hardware inside the Transputer I disassembled the complete microcode.

Regards

Claus

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cpm cpm schrieb am Montag, 23. August 2021 um 16:18:39 UTC+2:

...Thus the Transputer might be nice alternative if one refuses to work with a RISC-V :-)

Yes, I'm interested.
Do you have some code for testing? :)

B419

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Hi B419,

Thanks for your interest. So far, my project is not available in the public domain.
Please send me (cpm425) a mail (t-online.de) and we can discuss how you can get my Transputer for testing or other interesting projects.

Regards
Claus

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