• MIPS, processors and false idle

    From Marco Figueira@21:1/5 to All on Sun May 24 17:10:50 2020
    We recently made a reduction of 400 MBPS in a CS8380 (which also resulted in the removal of a processor) and there was an increase in the false idle factor, a day later, during heavy batch processing.
    Does anyone have any idea how it is possible to check if the use of the overlay (consequence of the false idle, I suppose) can be associated with the reduction of MIPS and processors?
    Thanks!
    Marco Figueira

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  • From Paul Kimpel@21:1/5 to Marco Figueira on Sun May 24 19:14:03 2020
    On 5/24/2020 5:10 PM, Marco Figueira wrote:
    We recently made a reduction of 400 MBPS in a CS8380 (which also resulted in the removal of a processor) and there was an increase in the false idle factor, a day later, during heavy batch processing.
    Does anyone have any idea how it is possible to check if the use of the overlay (consequence of the false idle, I suppose) can be associated with the reduction of MIPS and processors?
    Thanks!
    Marco Figueira


    I assume you are taking False Idle from the output of the U
    (Utilization) command. Seeing False Idle increase after removing a
    processor certainly seems counter-intuitive.

    What is your physical memory loading? Are you actually overlaying? Do
    you have a non-zero OLAYGOAL setting -- that can force overlay activity.

    Are you running MCP disk caching or memory disk? "I/O" going through
    those mechanisms uses E-mode cycles. Thus, if you have a reduced
    processor resource, tasks could be idle waiting for the processors to be
    "doing I/O".

    Paul

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  • From Marco Figueira@21:1/5 to All on Mon Jul 13 18:15:59 2020
    Hi Paul and all,

    Pardon me for the long delay in responding, due to illness, I return now. Then...
    Em domingo, 24 de maio de 2020 23:14:06 UTC-3, Paul Kimpel escreveu:
    I assume you are taking False Idle from the output of the U
    (Utilization) command. Seeing False Idle increase after removing a
    processor certainly seems counter-intuitive.
    Right.


    What is your physical memory loading? Are you actually overlaying? Do
    you have a non-zero OLAYGOAL setting -- that can force overlay activity.

    Our olaygoal is 1x10 ^ (- 7)

    Are you running MCP disk caching or memory disk? "I/O" going through
    those mechanisms uses E-mode cycles. Thus, if you have a reduced
    processor resource, tasks could be idle waiting for the processors to be "doing I/O".
    We solved the problem by reducing the ALLOWEDCORE of some banks because they were overestimated.
    Thanks for the cooperation :-)


    Paul

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