Hi Andrew,I'd like to write an FP exception handler for an 8260 running Custom OS. Can you give me the real sample code for that?I don't know what an 8260 is. For 603, 8240, and 750, here's what
How to clear sticky bits of FPSCR ?
works for me in the exception handler:
// We have to work extra hard to get and save the FPSCR.
// Do this only if we took a program exception.
lwz r3,_PPC_ESF_VEC_OFF(r1) // set r3 = exception vector
cmpwi r3,0x700 // was it a floating point exception?
bne+ 1f // if not, skip this sequence
// If floating point was not enabled when the exception happened,
// don't bother to save the FPSCR. (Perhaps this machine has no
// floating point unit.)
// We saved SRR1 in r9 so that we could inspect the FP bit here.
andi. r0,r9,_PPC_MSR_FP // was the FP enable bit set?
beq+ 1f // if not, skip this sequence
// Enable floating point instructions.
stwu r1,-24(r1) // set up a sort of stack frame
mfmsr r4 // save old MSR to r4
ori r5,r4,_PPC_MSR_FP // turn on the FP enable bit
mtmsr r5
isync
// Get and save the FPSCR.
stfd 0,16(r1) // preserve FR0
mffs 0 // get FPSCR into FR0 bits 32..63
stfd 0,8(r1) // store garbage at 8(r1),
// and FPSCR at 12(r1)
lwz r5,12(r1) // load FPSCR contents into r5
stw r5,_PPC_ESF_FPSCR+24(r1)// save for exception report
// Clear FPSCR exception bits: AND with 0007f0ff.
// This is necessary so that the FP exception doesn't fire again
// when we attempt a floating point instruction.
addi r6,0,0x0007
ori r6,r6,0xf0ff // r6 = 0007f0ff
and r5,r5,r6 // clear other bits in r5
stw r5,12(r1)
lfd 0,8(r1) // get that value into FR0
mtfsf 255,0 // get that value into FPSCR
// Restore FR0 and MSR.
lfd 0,16(r1) // restore FR0
mtmsr r4 // restore old MSR
isync
addi r1,r1,24 // undo stack frame
1:
// End of code to get and save the FPSCR.
-=- Andrew Klossner (and...@teleport.com)
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