Hello,
I was looking at this code: http://lxr.free-electrons.com/source/drivers/net/wireless/ath/ath9k/pci.c#L777

It looks like this code triggers a read from io memory (first ops->read), waits until value at another io memory location is set to expected code (hw_wait), then it reads final value from yet another io memory location (second ops->read).

Is there a document or a web page that would explain how low level io access like that works? Or if someone can explain, that would be great too.
Thanks a lot,

M

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