You can watch it at: https://youtu.be/i8HtlcsuKnE
This time, a string stack is added to the preprocessor - let's see how that works out..
And we replay a macro.
Hans Bezemer
You don't know what COW (copy-on-write) is.How do you know?
You are copying entire strings for words such as DUP and OVER.I got three implementations of a string stack. The first one copies pointers as well. Sometimes things are just "good enough".
With my STRING-STACK.4TH I just copy pointers.
The strings don't get copied until (and if) copying them is necessary.
Most of the time, my strings never get copied because they get consumed.
Your SWAP was hilarious! Doing four string copies is retarded!
You didn't know what Harvard Architecture is either. You think that segmented memoryNo arguments - no discussion. Learn that.
is Harvard Architecture. That is retarded!
You are publicly disgracing the entire Forth community with these "Back & Forth" videosNo arguments - no discussion. Learn that.
in which you represent yourself as being an expert on Forth programming.
The comp.lang.forth community disgraces themselves because they accept your idioticTheir problem, not mine.
videos and they never point out your gross ignorance of the subjects that you lecture on.
This is why real programmers in the real world consider the Forth community to beNo arguments - no discussion. Learn that.
nothing more than birds chirping in the forest --- not programmers at all.
Your chirping in your "Back & Forth" videos is just meaningless and idiotic nonsense.Everybody is entitled to their opinion.
You didn't know what Harvard Architecture is either. You think that segmented memoryNo arguments - no discussion. Learn that.
is Harvard Architecture. That is retarded!
ISTM unless one is still using relays, punched tape and electro-mechanical counters, the term 'Harvard architecture' could apply to any system where there exists:
"separate storage and signal pathways for instructions and data"
whichever way one chooses to define that.
You didn't know what Harvard Architecture is either. You think that segmented memoryNo arguments - no discussion. Learn that.
is Harvard Architecture. That is retarded!
But if I'm correct Harvard Architecture was mainly about ability to
speed-up execution by simultaneous access to code and the data
it uses. So the separation of code and data space was the mean
rather than goal, and it's done on hardware level.
Of course it's not a crime using that term for your solution, but rather „with tongue in cheek”.
This is clearly nonsense in view of register/register operations.ISTM unless one is still using relays, punched tape and electro-mechanical >> counters, the term 'Harvard architecture' could apply to any system where
there exists:
"separate storage and signal pathways for instructions and data"
whichever way one chooses to define that.
Possibly. What I was talking about is, for example, described on that
page: https://eng.libretexts.org/Bookshelves/Electrical_Engineering/Electronics/Implementing_a_One_Address_CPU_in_Logisim_(Kann)/01%3A_Introduction/1.03%3A_Von_Neumann_and_Harvard_Architectures
„…the major issue involved in deciding which architecture to use is that some
operations have to access memory both to fetch the instruction to execute, and to access data to operate on. Because memory can only be accessed
once per clock cycle, in principal a Von Neumann architecture requires at least
two clock cycles to execute an instruction, whereas a Harvard architecture can execute instructions in a single cycle.
The ability in a Harvard architecture to execute an instruction in a single
instruction leads to a much simpler and cleaner design for a CPU than
one implemented using a Von Neumann architecture.”
I read something like this before in microcontroller-related books, so I thought
it's a requirement for „true Harvard architecture”.
once per clock cycle, in principal a Von Neumann architecture requires at leastThis is clearly nonsense in view of register/register operations.
two clock cycles to execute an instruction, whereas a Harvard architecture can execute instructions in a single cycle.
once per clock cycle, in principal a Von Neumann architecture requires at leastThis is clearly nonsense in view of register/register operations.
two clock cycles to execute an instruction, whereas a Harvard architecture >> > can execute instructions in a single cycle.
…still this exactly what microcontroller-makers declare:
„AVR microcontrollers (MCUs) can execute most of instructions in single machine cycle too, but one machine cycle takes only one clock cycle.”
https://simple.wikipedia.org/wiki/Atmel_AVR
With all due respect, but you misunderstood this article.
It highlights a significant progress going from the AVR to the 8051
regard speed. You can argue that going to a Harvard architecture
contributes to it, but the main reason is general progress.
once per clock cycle, in principal a Von Neumann architecture requires at leastThis is clearly nonsense in view of register/register operations.
two clock cycles to execute an instruction, whereas a Harvard architecture
can execute instructions in a single cycle.
…still this exactly what microcontroller-makers declare:With all due respect, but you misunderstood this article.
„AVR microcontrollers (MCUs) can execute most of instructions in single machine cycle too, but one machine cycle takes only one clock cycle.”
https://simple.wikipedia.org/wiki/Atmel_AVR
It highlights a significant progress going from the AVR to the 8051
regard speed. You can argue that going to a Harvard architecture
contributes to it, but the main reason is general progress.
ISTM unless one is still using relays, punched tape and electro-mechanical >> counters, the term 'Harvard architecture' could apply to any system where
there exists:
"separate storage and signal pathways for instructions and data"
whichever way one chooses to define that.
Possibly. What I was talking about is, for example, described on that
page: https://eng.libretexts.org/Bookshelves/Electrical_Engineering/Electronics/Implementing_a_One_Address_CPU_in_Logisim_(Kann)/01%3A_Introduction/1.03%3A_Von_Neumann_and_Harvard_Architectures
„…the major issue involved in deciding which architecture to use is that some
operations have to access memory both to fetch the instruction to execute,
and to access data to operate on. Because memory can only be accessed
once per clock cycle, in principal a Von Neumann architecture requires at least
two clock cycles to execute an instruction, whereas a Harvard architecture
can execute instructions in a single cycle.
The ability in a Harvard architecture to execute an instruction in a single
instruction leads to a much simpler and cleaner design for a CPU than
one implemented using a Von Neumann architecture.”
I read something like this before in microcontroller-related books, so I thought
it's a requirement for „true Harvard architecture”.
On 31/01/2023 1:54 am, Zbig wrote:
ISTM unless one is still using relays, punched tape and electro-mechanical
counters, the term 'Harvard architecture' could apply to any system where >> there exists:
"separate storage and signal pathways for instructions and data"
whichever way one chooses to define that.
Possibly. What I was talking about is, for example, described on that page: https://eng.libretexts.org/Bookshelves/Electrical_Engineering/Electronics/Implementing_a_One_Address_CPU_in_Logisim_(Kann)/01%3A_Introduction/1.03%3A_Von_Neumann_and_Harvard_Architectures
„…the major issue involved in deciding which architecture to use is that some
operations have to access memory both to fetch the instruction to execute, and to access data to operate on. Because memory can only be accessed
once per clock cycle, in principal a Von Neumann architecture requires at least
two clock cycles to execute an instruction, whereas a Harvard architecture can execute instructions in a single cycle.
The ability in a Harvard architecture to execute an instruction in a single
instruction leads to a much simpler and cleaner design for a CPU than
one implemented using a Von Neumann architecture.”
I read something like this before in microcontroller-related books, so I thoughtI similarly held the view 'Harvard' was intended as an improvement ... until I
it's a requirement for „true Harvard architecture”.
read the Wikipedia article. While I don't see popular opinion/use of the term
abating any time soon, it doesn't mean I need to give it support - or for that
matter, be instrumental in its downfall. Pouring an occasional bucket of cold
water seems about right for me and conserves energy.
In article <7c4eedb9-83d1-414b-9629-6229ce4f78f5n@googlegroups.com>,This must clearly be, sorry.
Zbig <zbigniew2011@gmail.com> wrote:
With all due respect, but you misunderstood this article.once per clock cycle, in principal a Von Neumann architecture requires at leastThis is clearly nonsense in view of register/register operations.
two clock cycles to execute an instruction, whereas a Harvard architecture
can execute instructions in a single cycle.
…still this exactly what microcontroller-makers declare:
„AVR microcontrollers (MCUs) can execute most of instructions in single machine cycle too, but one machine cycle takes only one clock cycle.”
https://simple.wikipedia.org/wiki/Atmel_AVR
It highlights a significant progress going from the AVR to the 8051
regard speed. You can argue that going to a Harvard architecture
contributes to it, but the main reason is general progress.
What I was talking about was that they stated: „AVR microcontrollers >>(MCUs) can execute most of instructions in single machine cycle
too, but one machine cycle takes only one clock cycle.” — which
you've described as „clearly nonsense”.
I was not clear about what I called nonsense:
the statement that an 8051 could not perform one instruction in one
machine cycle. For performing one instruction you need not an
extra memory access besides the instruction fetch.--
An example would be a register / register operation.
Groetjes Albert
With all due respect, but you misunderstood this article.once per clock cycle, in principal a Von Neumann architecture requires at leastThis is clearly nonsense in view of register/register operations.
two clock cycles to execute an instruction, whereas a Harvard architecture
can execute instructions in a single cycle.
…still this exactly what microcontroller-makers declare:
„AVR microcontrollers (MCUs) can execute most of instructions in single machine cycle too, but one machine cycle takes only one clock cycle.”
https://simple.wikipedia.org/wiki/Atmel_AVR
It highlights a significant progress going from the AVR to the 8051
regard speed. You can argue that going to a Harvard architecture
contributes to it, but the main reason is general progress.
What I was talking about was that they stated: „AVR microcontrollers
(MCUs) can execute most of instructions in single machine cycle
too, but one machine cycle takes only one clock cycle.” — which
you've described as „clearly nonsense”.
(A normal c-program is a forced Harvard architecture on a linux/microsoft/apple host machine with virtual memory. Once the
program runs, it cannot access the memory where the program resides
unless for fetching instructions. )
On Monday, January 30, 2023 at 8:39:54 AM UTC-7, none albert wrote:Pal, you have to learn five things:
(A normal c-program is a forced Harvard architecture on a linux/microsoft/apple host machine with virtual memory. Once theAlbert van der Horst doesn't know what Harvard Architecture is either!
program runs, it cannot access the memory where the program resides
unless for fetching instructions. )
He also thinks that when a compiler separates code and data into different sections of memory this is Harvard Architecture.
The idea that software somehow creates a "forced Harvard Architecture"
is hilarious! Harvard Architecture is a characteristic of the processor hardware.
In a Harvard Architecture processor (such as the MiniForth), code and data each have their own address bus and data bus, so it is possible to access data memory concurrently with fetching the next instruction of code.
Albert van der Horst has already publicly admitted to being a Wikipedia editor.
https://groups.google.com/g/comp.lang.forth/c/qqlp1gZnVic
Normally Wikipedia editors use a pseudonym to hide their real identity because it is such a shameful business to pretend to be experts and educators on subjects that they know nothing about. On comp.lang.forth we have fake experts such as Hans Bezemer and Albert van der Horst who really know
nothing about the subjects that they educate the world on, but they are either
too dumb to realize that they are disgracing themselves in public, or they feel so proud of their political-correctness status on comp.lang.forth
that they get a thrill out of making a spectacle of their stupidity and getting away
without any criticism. John Passaniti was in this latter category.
On Tuesday, January 31, 2023 at 5:12:07 PM UTC+1, hughag...@gmail.com wrote:
On Monday, January 30, 2023 at 8:39:54 AM UTC-7, none albert wrote:
(A normal c-program is a forced Harvard architecture on a linux/microsoft/apple host machine with virtual memory. Once theAlbert van der Horst doesn't know what Harvard Architecture is either!
program runs, it cannot access the memory where the program resides unless for fetching instructions. )
He also thinks that when a compiler separates code and data into different sections of memory this is Harvard Architecture.
The idea that software somehow creates a "forced Harvard Architecture"
is hilarious! Harvard Architecture is a characteristic of the processor hardware.
In a Harvard Architecture processor (such as the MiniForth), code and data each have their own address bus and data bus, so it is possible to access data memory concurrently with fetching the next instruction of code.
Albert van der Horst has already publicly admitted to being a Wikipedia editor.Pal, you have to learn five things:
https://groups.google.com/g/comp.lang.forth/c/qqlp1gZnVic
Normally Wikipedia editors use a pseudonym to hide their real identity because it is such a shameful business to pretend to be experts and educators
on subjects that they know nothing about. On comp.lang.forth we have fake experts such as Hans Bezemer and Albert van der Horst who really know nothing about the subjects that they educate the world on, but they are either
too dumb to realize that they are disgracing themselves in public, or they feel so proud of their political-correctness status on comp.lang.forth
that they get a thrill out of making a spectacle of their stupidity and getting away
without any criticism. John Passaniti was in this latter category.
(1) If you want to enter a discussion, you have to address the arguments you opponent puts forward;
(2) If you pose a proposition, you have to back it up with evidence;
(3) Without any supporting arguments you're merely venting an opinion - and that is something that has zero value - you can just shrug it off;
(4) Ad hominem attacks - that's a well known logical fallacy - zero value; (5) Running gags only work in comedy.
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