• Realtime Forth

    From Lorem Ipsum@21:1/5 to All on Sun Dec 18 20:04:49 2022
    How often are Forth programs realtime applications?

    Some time back I was playing with reading an LED display that was multiplexed. I needed to read the multiplexed driver lines and turn that into a number. Very real time. The hard part was figuring out the timing points, but eventually I got it working.


    It didn't require timers or anything from the MCU, other than reading a port as fast as possible. So other than detecting the transitions, this was not so hard.

    What other real time apps have people worked on?

    --

    Rick C.

    - Get 1,000 miles of free Supercharging
    - Tesla referral code - https://ts.la/richard11209

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  • From Paul Rubin@21:1/5 to Lorem Ipsum on Sun Dec 18 21:31:05 2022
    Lorem Ipsum <gnuarm.deletethisbit@gmail.com> writes:
    What other real time apps have people worked on?

    A guy I knew made one of those gizmos with a row of LEDs on a motorized swinging rod, so that flashing the leds at the right times would show
    messages in the air. I don't know whether that was written in Forth
    though. There is a good chance that it was.

    Another buddy has made tons of cool realtime stuff with PIC
    microprocessors but generally programmed in assembler. I don't think he
    uses Forth at all.

    I worked on a voice communication program (the realtime aspect was
    keeping up with the sample rate of the audio converters) but it was in
    C, long before I got interested in Forth.

    I know people who have built RepRap 3D printers. Those use software for
    motor control, I believe. Probably not in Forth.

    Generally, processors and logic are now so cheap that it's often easier
    to shovel stuff off to peripherals that in the old days would have been
    done in software. I.e. most MCU's these days have UARTs, PWM, etc. that
    might have formerly been done by software bit banging. That gets rid of
    a fair amount of realtime code.

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  • From Lorem Ipsum@21:1/5 to Paul Rubin on Sun Dec 18 21:54:34 2022
    On Monday, December 19, 2022 at 12:31:08 AM UTC-5, Paul Rubin wrote:
    Lorem Ipsum <gnuarm.del...@gmail.com> writes:
    What other real time apps have people worked on?
    A guy I knew made one of those gizmos with a row of LEDs on a motorized swinging rod, so that flashing the leds at the right times would show messages in the air. I don't know whether that was written in Forth
    though. There is a good chance that it was.

    Another buddy has made tons of cool realtime stuff with PIC
    microprocessors but generally programmed in assembler. I don't think he
    uses Forth at all.

    I worked on a voice communication program (the realtime aspect was
    keeping up with the sample rate of the audio converters) but it was in
    C, long before I got interested in Forth.

    I know people who have built RepRap 3D printers. Those use software for
    motor control, I believe. Probably not in Forth.

    Generally, processors and logic are now so cheap that it's often easier
    to shovel stuff off to peripherals that in the old days would have been
    done in software. I.e. most MCU's these days have UARTs, PWM, etc. that
    might have formerly been done by software bit banging. That gets rid of
    a fair amount of realtime code.

    I don't agree that using UARTs and PWMs gets rid of real time coding. It just works with longer time intervals, so the requirements are more relaxed.

    I guess I should have asked, what real time Forth apps have people worked on?

    --

    Rick C.

    + Get 1,000 miles of free Supercharging
    + Tesla referral code - https://ts.la/richard11209

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  • From Paul Rubin@21:1/5 to Lorem Ipsum on Sun Dec 18 23:39:50 2022
    Lorem Ipsum <gnuarm.deletethisbit@gmail.com> writes:
    I don't agree that using UARTs and PWMs gets rid of real time coding.

    They get rid of some, though of course not all. The peripheral
    processor on the RP2040 is sort of a fancy PWM that gets rid of even
    more (but requires its own coding...).

    It just works with longer time intervals, so the requirements are more relaxed.

    Yes, if the UART is buffered, things become a lot simpler and it stops requiring what I think of as realtime programming methods. Tax filing
    software is realtime in that if it doesn't finish by April 15th then you
    are in trouble, but we normally use the term differently.

    I guess I should have asked, what real time Forth apps have people
    worked on?

    I remember Andrew Haley mentioning he had done some robotics stuff in
    Forth. Some of the other stuff I mentioned would have been ok to do in
    Forth even if the implementer ended up using something else.

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  • From minforth@arcor.de@21:1/5 to gnuarm.del...@gmail.com on Mon Dec 19 01:12:25 2022
    gnuarm.del...@gmail.com schrieb am Montag, 19. Dezember 2022 um 06:54:36 UTC+1:
    On Monday, December 19, 2022 at 12:31:08 AM UTC-5, Paul Rubin wrote:
    Lorem Ipsum <gnuarm.del...@gmail.com> writes:
    What other real time apps have people worked on?
    A guy I knew made one of those gizmos with a row of LEDs on a motorized swinging rod, so that flashing the leds at the right times would show messages in the air. I don't know whether that was written in Forth
    though. There is a good chance that it was.

    Another buddy has made tons of cool realtime stuff with PIC
    microprocessors but generally programmed in assembler. I don't think he uses Forth at all.

    I worked on a voice communication program (the realtime aspect was
    keeping up with the sample rate of the audio converters) but it was in
    C, long before I got interested in Forth.

    I know people who have built RepRap 3D printers. Those use software for motor control, I believe. Probably not in Forth.

    Generally, processors and logic are now so cheap that it's often easier
    to shovel stuff off to peripherals that in the old days would have been done in software. I.e. most MCU's these days have UARTs, PWM, etc. that might have formerly been done by software bit banging. That gets rid of
    a fair amount of realtime code.
    I don't agree that using UARTs and PWMs gets rid of real time coding. It just works with longer time intervals, so the requirements are more relaxed.

    I guess I should have asked, what real time Forth apps have people worked on?

    FlexOS real-time OS had been a fantastic platform to build RT applications on. Core app was the time-sliced scheduler.

    "You don't want to be as fast as possible, but as fast as specified!"

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  • From dxforth@21:1/5 to Lorem Ipsum on Mon Dec 19 20:16:44 2022
    On 19/12/2022 3:04 pm, Lorem Ipsum wrote:
    How often are Forth programs realtime applications?

    Some time back I was playing with reading an LED display that was multiplexed. I needed to read the multiplexed driver lines and turn that into a number. Very real time. The hard part was figuring out the timing points, but eventually I got it
    working.

    It didn't require timers or anything from the MCU, other than reading a port as fast as possible. So other than detecting the transitions, this was not so hard.

    What other real time apps have people worked on?


    MPE's motto was "more real, less time". It appears not to have made the transition to vfxforth.com. Sign of the times - less real, more time?

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  • From none) (albert@21:1/5 to gnuarm.deletethisbit@gmail.com on Mon Dec 19 11:32:55 2022
    In article <826ec16a-340d-4555-bdf3-ef0be8eff5e8n@googlegroups.com>,
    Lorem Ipsum <gnuarm.deletethisbit@gmail.com> wrote:
    How often are Forth programs realtime applications?

    Some time back I was playing with reading an LED display that was >multiplexed. I needed to read the multiplexed driver lines and turn
    that into a number. Very real time. The hard part was figuring out the >timing points, but eventually I got it working.

    It didn't require timers or anything from the MCU, other than reading a
    port as fast as possible. So other than detecting the transitions, this
    was not so hard.

    What other real time apps have people worked on?

    tmanx en hundreds of Forth robots (Dutch Forth Chapter) https://www.youtube.com/watch?v=hMypxvAwhaw

    Search Willem Ouwerkerk at youtube.
    ~

    --

    Rick C.


    Groetjes Albert
    --
    "in our communism country Viet Nam, people are forced to be
    alive and in the western country like US, people are free to
    die from Covid 19 lol" duc ha
    albert@spe&ar&c.xs4all.nl &=n http://home.hccnet.nl/a.w.m.van.der.horst

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  • From Clive Arthur@21:1/5 to Lorem Ipsum on Mon Dec 19 10:48:45 2022
    On 19/12/2022 04:04, Lorem Ipsum wrote:
    How often are Forth programs realtime applications?

    Some time back I was playing with reading an LED display that was multiplexed. I needed to read the multiplexed driver lines and turn that into a number. Very real time. The hard part was figuring out the timing points, but eventually I got it
    working.

    It didn't require timers or anything from the MCU, other than reading a port as fast as possible. So other than detecting the transitions, this was not so hard.

    What other real time apps have people worked on?


    https://www.denisonmayesgroup.com/Rubicon-default.htm

    The controller uses an 8MHz RTX2001 and ADSP2111 IIRC. The RTX code is
    Forth generated with an MPE cross-compiler, the ADSP code is assembler.
    It's hard real time, generating control waveforms etc, though the ADSP
    does the PIDish control loop.

    As you can see from the PC, this was a while back. One great feature of
    a stack machine for real-time is interrupt response time - no need to
    stack a load of stuff, it's already there. [Yes, I know things have
    moved on a bit...]

    --
    Cheers
    Clive

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  • From Lorem Ipsum@21:1/5 to Clive Arthur on Mon Dec 19 06:51:30 2022
    On Monday, December 19, 2022 at 5:48:48 AM UTC-5, Clive Arthur wrote:
    On 19/12/2022 04:04, Lorem Ipsum wrote:
    How often are Forth programs realtime applications?

    Some time back I was playing with reading an LED display that was multiplexed. I needed to read the multiplexed driver lines and turn that into a number. Very real time. The hard part was figuring out the timing points, but eventually I got it
    working.

    It didn't require timers or anything from the MCU, other than reading a port as fast as possible. So other than detecting the transitions, this was not so hard.

    What other real time apps have people worked on?

    https://www.denisonmayesgroup.com/Rubicon-default.htm

    The controller uses an 8MHz RTX2001 and ADSP2111 IIRC. The RTX code is
    Forth generated with an MPE cross-compiler, the ADSP code is assembler.
    It's hard real time, generating control waveforms etc, though the ADSP
    does the PIDish control loop.

    As you can see from the PC, this was a while back. One great feature of
    a stack machine for real-time is interrupt response time - no need to
    stack a load of stuff, it's already there. [Yes, I know things have
    moved on a bit...]

    That was one of the things I optimized in my stack processor designs. If the interrupt was enabled, the next instruction would be the context switch (essentially a subroutine call that also pushes the PSW to the data stack, before switching the data
    stack pointer). The return stack is not changed, so the interrupt needs to restore the return stack pointer before... returning.

    This context switch uses one clock cycle.

    --

    Rick C.

    -- Get 1,000 miles of free Supercharging
    -- Tesla referral code - https://ts.la/richard11209

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  • From Anton Ertl@21:1/5 to Clive Arthur on Tue Dec 20 17:10:49 2022
    Clive Arthur <clive@nowaytoday.co.uk> writes:
    One great feature of
    a stack machine for real-time is interrupt response time - no need to
    stack a load of stuff, it's already there.

    If the stack items are in main memory, then yes, but then the machine
    is always slow.

    If the stack items are in a dedicated memory on-chip, as on Chuck
    Moore's designs since at least the uP20, it can run a lot faster, but
    for interrupts you need to make these stacks larger (just as some
    register machines have a second register file for dealing with
    interrupts); AFAIK Chuck Moore's designs since the uP20 do not support interrupts. And for context switching you need to save the whole
    stack contents to main memory.

    - anton
    --
    M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html
    comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html
    New standard: https://forth-standard.org/
    EuroForth 2022: https://euro.theforth.net

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  • From Paul Rubin@21:1/5 to Lorem Ipsum on Tue Dec 20 11:44:47 2022
    Lorem Ipsum <gnuarm.deletethisbit@gmail.com> writes:
    I guess I should have asked, what real time Forth apps have people
    worked on?

    Also I don't know if it counts, but lots of signal processing apps are
    real time. A sample arrives, put into a digital filter, and the filter
    output must be emitted at the same sample rate as the input.

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  • From Lorem Ipsum@21:1/5 to Anton Ertl on Tue Dec 20 18:48:54 2022
    On Tuesday, December 20, 2022 at 12:34:16 PM UTC-5, Anton Ertl wrote:
    Clive Arthur <cl...@nowaytoday.co.uk> writes:
    One great feature of
    a stack machine for real-time is interrupt response time - no need to >stack a load of stuff, it's already there.
    If the stack items are in main memory, then yes, but then the machine
    is always slow.

    If the stack items are in a dedicated memory on-chip, as on Chuck
    Moore's designs since at least the uP20, it can run a lot faster, but
    for interrupts you need to make these stacks larger (just as some
    register machines have a second register file for dealing with
    interrupts); AFAIK Chuck Moore's designs since the uP20 do not support interrupts. And for context switching you need to save the whole
    stack contents to main memory.

    Personally, I think the way to implement context switching in a stack processor is to have a stack for each context. When I'm using CPUs for real time events, the timing is usually pretty short and the time to save registers in memory is rather
    excessive. Of course, I'm using the same sort of memory components for the stack as I would memory, since it's all in the FPGA. External memory would be absurdly slow. If I had that much time, I would just add an MCU for $2 or less.

    That said, I don't recall the stack size I typically allocate. Initially I used the entire BRAM which is usually 16/18 x 1k or some are double that. I think I have used the dual port feature to share a block between two stacks, so then it's 16/18 x 512.
    That's a deep stack for a stack processor. If shared between 16 contexts, it gives a 32 deep stack. That could provide for pipelining the entire processor, not for speed, but for running multiple processors on the same hardware, time sliced actually.
    So 8 virtual processes could have two contexts and 32 elements on each stack. One context would be "background" code, and the other context could be an interrupt for a total of 8 background tasks and 8 interrupts.

    This would be a very small portion of pretty much any FPGA. I hope I have time in the future to pursue this.

    --

    Rick C.

    -+ Get 1,000 miles of free Supercharging
    -+ Tesla referral code - https://ts.la/richard11209

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  • From Lorem Ipsum@21:1/5 to Paul Rubin on Tue Dec 20 18:56:17 2022
    On Tuesday, December 20, 2022 at 2:44:49 PM UTC-5, Paul Rubin wrote:
    Lorem Ipsum <gnuarm.del...@gmail.com> writes:
    I guess I should have asked, what real time Forth apps have people
    worked on?
    Also I don't know if it counts, but lots of signal processing apps are
    real time. A sample arrives, put into a digital filter, and the filter output must be emitted at the same sample rate as the input.

    Sure, but not so commonly done in Forth. In fact, not so commonly done on anything other than DSP processors. Simpler stuff can be run on MCUs. I think when ARM came out with the CM3, or maybe the next one, they added some optimizations that could, in
    theory, give the chip the ability to process certain DSP functions at a rate of 1 per clock cycle. But the killer in most DSP work is typically the memory interface. DSP chips typically have three ports, so two operands can be read and one written for
    each instruction.

    Even the GA144 was not really suited for DSP, other than the fact that it could crank out a lot of MIPS on one chip. The problem was getting the data where the processors could operate on it effectively. That, and the fact it had no multiply
    instruction, other than a "step" instruction that needed to be repeated for each bit.

    --

    Rick C.

    +- Get 1,000 miles of free Supercharging
    +- Tesla referral code - https://ts.la/richard11209

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  • From minforth@arcor.de@21:1/5 to gnuarm.del...@gmail.com on Wed Dec 21 01:04:04 2022
    gnuarm.del...@gmail.com schrieb am Mittwoch, 21. Dezember 2022 um 03:56:19 UTC+1:
    On Tuesday, December 20, 2022 at 2:44:49 PM UTC-5, Paul Rubin wrote:
    Lorem Ipsum <gnuarm.del...@gmail.com> writes:
    I guess I should have asked, what real time Forth apps have people
    worked on?
    Also I don't know if it counts, but lots of signal processing apps are
    real time. A sample arrives, put into a digital filter, and the filter output must be emitted at the same sample rate as the input.
    Sure, but not so commonly done in Forth. In fact, not so commonly done on anything other than DSP processors.
    Simpler stuff can be run on MCUs.

    DSPs are specialized but otherwise "rather dumb". By far most of the work to build HW/SW circuits around DSPs means feeding them without delays or time jitter
    and processing their outputs. This work requires programmable MCUs. I would not call their task simpler. It is more the other way round.

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  • From none) (albert@21:1/5 to Anton Ertl on Wed Dec 21 10:44:50 2022
    In article <2022Dec20.181049@mips.complang.tuwien.ac.at>,
    Anton Ertl <anton@mips.complang.tuwien.ac.at> wrote:
    Clive Arthur <clive@nowaytoday.co.uk> writes:
    One great feature of
    a stack machine for real-time is interrupt response time - no need to
    stack a load of stuff, it's already there.

    If the stack items are in main memory, then yes, but then the machine
    is always slow.

    If the stack items are in a dedicated memory on-chip, as on Chuck
    Moore's designs since at least the uP20, it can run a lot faster, but
    for interrupts you need to make these stacks larger (just as some
    register machines have a second register file for dealing with
    interrupts); AFAIK Chuck Moore's designs since the uP20 do not support >interrupts. And for context switching you need to save the whole
    stack contents to main memory.

    In my implementation of pre emptive multi tasking each task has
    equivalent resources as the main task: stacks, user area, terminal
    input buffer, plus a restricted (but arbitrary size) area where it can
    compile its own definitions.

    As regard with interrupts. I can't see that there is anything that
    has to be saved, operating on a stack machine, apart from the
    registers the interrupt routine uses, which may be very restricted.


    - anton

    Groetjes Albert
    --
    "in our communism country Viet Nam, people are forced to be
    alive and in the western country like US, people are free to
    die from Covid 19 lol" duc ha
    albert@spe&ar&c.xs4all.nl &=n http://home.hccnet.nl/a.w.m.van.der.horst

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  • From Marcel Hendrix@21:1/5 to none albert on Wed Dec 21 03:40:17 2022
    On Wednesday, December 21, 2022 at 10:44:52 AM UTC+1, none albert wrote:
    [..]
    As regard with interrupts. I can't see that there is anything that
    has to be saved, operating on a stack machine, apart from the
    registers the interrupt routine uses, which may be very restricted.

    As Koopman argued: fast real-time forbids a cache, and without
    cache, performance will not be competitive.

    I'm not really sure, but inserting the hardware RDTSC timer
    instruction in every sourceline, as I do for the iForth profiler,
    slows down the code by a factor of three or four (at least).

    -marcel

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  • From Marcel Hendrix@21:1/5 to Marcel Hendrix on Wed Dec 21 04:52:31 2022
    On Wednesday, December 21, 2022 at 12:40:19 PM UTC+1, Marcel Hendrix wrote:
    I'm not really sure, but inserting the hardware RDTSC timer
    instruction in every sourceline, as I do for the iForth profiler,
    slows down the code by a factor of three or four (at least).

    Sorry, I should have mentioned that the sequence is CPUID RDTSC, where
    CPUID forces serialization (necessary on multi-core).

    -marcel

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  • From Lorem Ipsum@21:1/5 to minf...@arcor.de on Wed Dec 21 06:52:35 2022
    On Wednesday, December 21, 2022 at 4:04:06 AM UTC-5, minf...@arcor.de wrote:
    gnuarm.del...@gmail.com schrieb am Mittwoch, 21. Dezember 2022 um 03:56:19 UTC+1:
    On Tuesday, December 20, 2022 at 2:44:49 PM UTC-5, Paul Rubin wrote:
    Lorem Ipsum <gnuarm.del...@gmail.com> writes:
    I guess I should have asked, what real time Forth apps have people worked on?
    Also I don't know if it counts, but lots of signal processing apps are real time. A sample arrives, put into a digital filter, and the filter output must be emitted at the same sample rate as the input.
    Sure, but not so commonly done in Forth. In fact, not so commonly done on anything other than DSP processors.
    Simpler stuff can be run on MCUs.

    DSPs are specialized but otherwise "rather dumb". By far most of the work to build HW/SW circuits around DSPs means feeding them without delays or time jitter
    and processing their outputs. This work requires programmable MCUs. I would not
    call their task simpler. It is more the other way round.

    Not sure what you are saying. MCUs are less adapted to implementing DSP algorithms. DSP chips are specifically designed for it. As such, DSP chips can implement more demanding applications, while MCUs can not. "feeding them without delays or time
    jitter" is pretty vague. The DSP chip is just a means of performing calculations rapidly, so specific timing goals can be met. Synchronization requires a particular mechanism. That's true regardless of the device implementing the DSP code.

    Not at all sure what you mean by saying DSP chips are "rather dumb".

    There are CPU devices that try to be a middle ground between DSP and MCUs. They have DSP CPUs at their core, but include the sort of peripheral devices that are commonly included with MCUs.

    --

    Rick C.

    ++ Get 1,000 miles of free Supercharging
    ++ Tesla referral code - https://ts.la/richard11209

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  • From Anton Ertl@21:1/5 to Marcel Hendrix on Wed Dec 21 14:53:19 2022
    Marcel Hendrix <mhx@iae.nl> writes:
    Sorry, I should have mentioned that the sequence is CPUID RDTSC, where >CPUID forces serialization (necessary on multi-core).

    How does CPUID help with multi-core?

    Anyway, even if it helps: Given that the time stamp counter runs at a
    constant clock rate, maybe it's enough to establish the difference
    between different cores at some point, and from then on use these
    differences to correct the results without needing CPUID. I am not
    sure if the TSC continues counting in sleep states on all machines,
    however.

    - anton
    --
    M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html
    comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html
    New standard: https://forth-standard.org/
    EuroForth 2022: https://euro.theforth.net

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  • From none) (albert@21:1/5 to mhx@iae.nl on Wed Dec 21 15:33:13 2022
    In article <48059a98-252a-446a-9ca6-cce575c618cdn@googlegroups.com>,
    Marcel Hendrix <mhx@iae.nl> wrote:
    On Wednesday, December 21, 2022 at 12:40:19 PM UTC+1, Marcel Hendrix wrote:
    I'm not really sure, but inserting the hardware RDTSC timer
    instruction in every sourceline, as I do for the iForth profiler,
    slows down the code by a factor of three or four (at least).

    Sorry, I should have mentioned that the sequence is CPUID RDTSC, where >CPUID forces serialization (necessary on multi-core).

    I read the documentation if the Orange pi one plus.
    There is a counter, starting from power up. You can read it, from
    whatever the four cores. How come serialisation come in?


    -marcel

    Groetjes Albert
    --
    "in our communism country Viet Nam, people are forced to be
    alive and in the western country like US, people are free to
    die from Covid 19 lol" duc ha
    albert@spe&ar&c.xs4all.nl &=n http://home.hccnet.nl/a.w.m.van.der.horst

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  • From Anton Ertl@21:1/5 to Marcel Hendrix on Wed Dec 21 14:02:09 2022
    Marcel Hendrix <mhx@iae.nl> writes:
    As Koopman argued: fast real-time forbids a cache

    When did he argue that?

    The people from University of Saarland/AbsInt found some time ago that
    they could model a true LRU cache in their static analysis quite well;
    i.e., they got much better worst-case execution time (WCET) than by
    always assuming a cache miss (and my impression is also that they get
    much better results than what one would get for an otherwise similar
    CPU but without cache). Of course it depends on how well the access
    pattern can be analysed; pointer chasing and index arrays tend to
    destroy the analysis, but you usually can avoid those in code intended
    for hard real-time systems.

    One other problem is that CPUs tend to have true LRU only up to 2-way associativity, and have a pseudo-LRU that hampers the analysis (IIRC
    the result is as bad as if the CPU had only two ways).

    Some CPUs that are intended for real-time allow you to lock cache
    lines so they are never replaced. So if you have an 8-way
    set-associative cache, you can lock some data where you want good
    access times (e.g., hard-to-analyse accesses) into the cache lines
    belonging to six ways, and use the remaining two ways as a true-LRU
    cache that you can analyse for data that is accessed in an
    analysis-friendly way.

    WRT Forth, AFAIK there is no WCET analysis for Forth systems, so they
    are out of the market for provable hard real-time anyway.

    What remains is the older way to just measure the actual behaviour,
    apply a fudge factor, and hope that the circumstances never conspire
    to overcome the fudge factor. This is, of course, much harder once microarchitectural features such as caches are in play that can
    produce very big speedups (and need correspondingly larger fudge
    factors).

    - anton
    --
    M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html
    comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html
    New standard: https://forth-standard.org/
    EuroForth 2022: https://euro.theforth.net

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  • From Lorem Ipsum@21:1/5 to none albert on Wed Dec 21 07:06:03 2022
    On Wednesday, December 21, 2022 at 4:44:52 AM UTC-5, none albert wrote:
    In article <2022Dec2...@mips.complang.tuwien.ac.at>,
    Anton Ertl <an...@mips.complang.tuwien.ac.at> wrote:
    Clive Arthur <cl...@nowaytoday.co.uk> writes:
    One great feature of
    a stack machine for real-time is interrupt response time - no need to >>stack a load of stuff, it's already there.

    If the stack items are in main memory, then yes, but then the machine
    is always slow.

    If the stack items are in a dedicated memory on-chip, as on Chuck
    Moore's designs since at least the uP20, it can run a lot faster, but
    for interrupts you need to make these stacks larger (just as some
    register machines have a second register file for dealing with >interrupts); AFAIK Chuck Moore's designs since the uP20 do not support >interrupts. And for context switching you need to save the whole
    stack contents to main memory.
    In my implementation of pre emptive multi tasking each task has
    equivalent resources as the main task: stacks, user area, terminal
    input buffer, plus a restricted (but arbitrary size) area where it can compile its own definitions.

    As regard with interrupts. I can't see that there is anything that
    has to be saved, operating on a stack machine, apart from the
    registers the interrupt routine uses, which may be very restricted.

    In my CPU designs, there is only one register to be saved, the PSW, and that's automatic like the return address. One of the things I've investigated is for the context change to have it's own stack where information can be stored between context
    changes. One test case I used was an interrupt handler that managed a DDS. It had three pairs of numbers used to modulate an NCO. At every sample interval, the next output value is calculated and sent to the DAC, all in the interrupt handler. The
    code to juggle all this was very messy, which was the impetus to find a stack architecture that minimizes stack juggling. It was assumed that the data used in the calculations was already on the stack.

    --

    Rick C.

    --- Get 1,000 miles of free Supercharging
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  • From Lorem Ipsum@21:1/5 to Marcel Hendrix on Wed Dec 21 07:10:17 2022
    On Wednesday, December 21, 2022 at 6:40:19 AM UTC-5, Marcel Hendrix wrote:
    On Wednesday, December 21, 2022 at 10:44:52 AM UTC+1, none albert wrote:
    [..]
    As regard with interrupts. I can't see that there is anything that
    has to be saved, operating on a stack machine, apart from the
    registers the interrupt routine uses, which may be very restricted.
    As Koopman argued: fast real-time forbids a cache, and without
    cache, performance will not be competitive.

    That's an odd statement. The GA144 runs at up to 700 MIPS on a 180 nm process with no cache. That's pretty competitive... Cache is only required for devices that have slow program store. It has nothing to do with real time processing.


    I'm not really sure, but inserting the hardware RDTSC timer
    instruction in every sourceline, as I do for the iForth profiler,
    slows down the code by a factor of three or four (at least).

    Sounds like a bad idea.

    --

    Rick C.

    --+ Get 1,000 miles of free Supercharging
    --+ Tesla referral code - https://ts.la/richard11209

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  • From minforth@arcor.de@21:1/5 to gnuarm.del...@gmail.com on Wed Dec 21 08:15:16 2022
    gnuarm.del...@gmail.com schrieb am Mittwoch, 21. Dezember 2022 um 15:52:37 UTC+1:
    On Wednesday, December 21, 2022 at 4:04:06 AM UTC-5, minf...@arcor.de wrote:
    gnuarm.del...@gmail.com schrieb am Mittwoch, 21. Dezember 2022 um 03:56:19 UTC+1:
    On Tuesday, December 20, 2022 at 2:44:49 PM UTC-5, Paul Rubin wrote:
    Lorem Ipsum <gnuarm.del...@gmail.com> writes:
    I guess I should have asked, what real time Forth apps have people worked on?
    Also I don't know if it counts, but lots of signal processing apps are real time. A sample arrives, put into a digital filter, and the filter output must be emitted at the same sample rate as the input.
    Sure, but not so commonly done in Forth. In fact, not so commonly done on anything other than DSP processors.
    Simpler stuff can be run on MCUs.

    DSPs are specialized but otherwise "rather dumb". By far most of the work to
    build HW/SW circuits around DSPs means feeding them without delays or time jitter
    and processing their outputs. This work requires programmable MCUs. I would not
    call their task simpler. It is more the other way round.
    Not sure what you are saying. MCUs are less adapted to implementing DSP algorithms. DSP chips are specifically designed for it. As such, DSP chips can implement more demanding applications, while MCUs can not. "feeding them without delays or time
    jitter" is pretty vague. The DSP chip is just a means of performing calculations rapidly, so specific timing goals can be met. Synchronization requires a particular mechanism. That's true regardless of the device implementing the DSP code.

    Not at all sure what you mean by saying DSP chips are "rather dumb".

    There are CPU devices that try to be a middle ground between DSP and MCUs. They have DSP CPUs at their core, but include the sort of peripheral devices that are commonly included with MCUs.


    This is obviously a misunderstanding. ISTM that you are very focussed on CPU technology,
    please correct me if I am wrong. OTOH for me, those DSPs are just a small albeit central
    part of a greater complex system that includes AD/DA converters, analog signal conditioning,
    error correction, de-/normalization, perhaps managing short and long term storage,
    perhaps compression and decompression, etc.

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  • From Marcel Hendrix@21:1/5 to none albert on Wed Dec 21 10:11:56 2022
    On Wednesday, December 21, 2022 at 3:33:16 PM UTC+1, none albert wrote:
    [..]
    I read the documentation if the Orange pi one plus.
    There is a counter, starting from power up. You can read it, from
    whatever the four cores. How come serialisation come in?

    The problem is that code might wander around on the cores, because there
    there are power-saving / throttling mechanisms at work. Yes, it should
    be easy to fix that with an always-up dedicated counter/timer on the motherboard or in the chipset, but it appears current Intel/AMD cpu's
    don't have (an accurate) one.

    -marcel

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  • From Lorem Ipsum@21:1/5 to minf...@arcor.de on Wed Dec 21 09:26:49 2022
    On Wednesday, December 21, 2022 at 11:15:17 AM UTC-5, minf...@arcor.de wrote:
    gnuarm.del...@gmail.com schrieb am Mittwoch, 21. Dezember 2022 um 15:52:37 UTC+1:
    On Wednesday, December 21, 2022 at 4:04:06 AM UTC-5, minf...@arcor.de wrote:
    gnuarm.del...@gmail.com schrieb am Mittwoch, 21. Dezember 2022 um 03:56:19 UTC+1:
    On Tuesday, December 20, 2022 at 2:44:49 PM UTC-5, Paul Rubin wrote:
    Lorem Ipsum <gnuarm.del...@gmail.com> writes:
    I guess I should have asked, what real time Forth apps have people worked on?
    Also I don't know if it counts, but lots of signal processing apps are
    real time. A sample arrives, put into a digital filter, and the filter
    output must be emitted at the same sample rate as the input.
    Sure, but not so commonly done in Forth. In fact, not so commonly done on anything other than DSP processors.
    Simpler stuff can be run on MCUs.

    DSPs are specialized but otherwise "rather dumb". By far most of the work to
    build HW/SW circuits around DSPs means feeding them without delays or time jitter
    and processing their outputs. This work requires programmable MCUs. I would not
    call their task simpler. It is more the other way round.
    Not sure what you are saying. MCUs are less adapted to implementing DSP algorithms. DSP chips are specifically designed for it. As such, DSP chips can implement more demanding applications, while MCUs can not. "feeding them without delays or time
    jitter" is pretty vague. The DSP chip is just a means of performing calculations rapidly, so specific timing goals can be met. Synchronization requires a particular mechanism. That's true regardless of the device implementing the DSP code.

    Not at all sure what you mean by saying DSP chips are "rather dumb".

    There are CPU devices that try to be a middle ground between DSP and MCUs. They have DSP CPUs at their core, but include the sort of peripheral devices that are commonly included with MCUs.

    This is obviously a misunderstanding. ISTM that you are very focussed on CPU technology,
    please correct me if I am wrong. OTOH for me, those DSPs are just a small albeit central
    part of a greater complex system that includes AD/DA converters, analog signal conditioning,
    error correction, de-/normalization, perhaps managing short and long term storage,
    perhaps compression and decompression, etc.

    I'm not sure what you are getting at. The topic of this thread is Forth real time systems.

    You made a statement that I asked for clarification on, and now you are branching the discussion.

    What are you trying to discuss?

    --

    Rick C.

    -+- Get 1,000 miles of free Supercharging
    -+- Tesla referral code - https://ts.la/richard11209

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  • From Anton Ertl@21:1/5 to Lorem Ipsum on Wed Dec 21 18:04:27 2022
    Lorem Ipsum <gnuarm.deletethisbit@gmail.com> writes:
    On Wednesday, December 21, 2022 at 6:40:19 AM UTC-5, Marcel Hendrix wrote:
    As Koopman argued: fast real-time forbids a cache, and without
    cache, performance will not be competitive.

    That's an odd statement. The GA144 runs at up to 700 MIPS on a 180 nm process with no cache.

    Each core has a 64 words of memory, for a whopping total of 9216 words (20.25KB) for all 144 cores (but of course each core can only access
    its own 64 words).

    That's pretty competitive...

    Is it? Can you name any design wins?

    Even if the GA144 had been available in 2002, when 180nm was the
    current thing, it would not have been competetive. E.g., the
    Willamette (180nm Pentium 4) runs at up to 6000 MIPS on a 180nm
    process, has an 8KB data cache, a 12K uop Trace cache, and 256KB L2
    cache. The Palomino (180nm Athlon XP) runs at 5200MIPS on a 180nm
    process and has 64KB data and 64KB instruction cache and 256KB L2
    cache.

    GA144 fans might argue that the Willamette and the Palomino have only
    one core while the GA144 has 144, but nobody wants to program 144
    cores, if each has access to only 64 words of memory.

    - anton
    --
    M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html
    comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html
    New standard: https://forth-standard.org/
    EuroForth 2022: https://euro.theforth.net

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  • From minforth@arcor.de@21:1/5 to gnuarm.del...@gmail.com on Wed Dec 21 10:55:25 2022
    gnuarm.del...@gmail.com schrieb am Mittwoch, 21. Dezember 2022 um 18:26:50 UTC+1:
    I'm not sure what you are getting at. The topic of this thread is Forth real time systems.
    You made a statement that I asked for clarification on, and now you are branching the discussion.
    What are you trying to discuss?

    Isn't it obvious? Try to build a RT Forth on a DSP alone. IOW classic Forth multitasking
    is monolithic. When it was invented, multicores and distributed systems (outside big frames)
    did not exist yet. For synchronized realtime apps between different CPUs on a MCU board,
    let alone networked (sub)systems, you need sync and inter-CPU communication mechanisms
    (even if it is only a common beat or watchdog hardware line).

    For big distributed systems Golangs goroutines went into the right direction. For small systems
    Forth can be excellent, but it is missing many things for practical realtime apps on board level.
    I don't mean single-CPU Arduinos and the like here.

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  • From Lorem Ipsum@21:1/5 to Anton Ertl on Wed Dec 21 13:14:04 2022
    On Wednesday, December 21, 2022 at 1:35:39 PM UTC-5, Anton Ertl wrote:
    Lorem Ipsum <gnuarm.del...@gmail.com> writes:
    On Wednesday, December 21, 2022 at 6:40:19 AM UTC-5, Marcel Hendrix wrote: >> As Koopman argued: fast real-time forbids a cache, and without
    cache, performance will not be competitive.

    That's an odd statement. The GA144 runs at up to 700 MIPS on a 180 nm process with no cache.
    Each core has a 64 words of memory, for a whopping total of 9216 words (20.25KB) for all 144 cores (but of course each core can only access
    its own 64 words).

    That's pretty competitive...

    Is it? Can you name any design wins?

    You know how secretive they are about that.


    Even if the GA144 had been available in 2002, when 180nm was the
    current thing, it would not have been competetive. E.g., the
    Willamette (180nm Pentium 4) runs at up to 6000 MIPS on a 180nm
    process, has an 8KB data cache, a 12K uop Trace cache, and 256KB L2
    cache. The Palomino (180nm Athlon XP) runs at 5200MIPS on a 180nm
    process and has 64KB data and 64KB instruction cache and 256KB L2
    cache.

    You seem to be comparing apples and oranges. The GA144 can run from a couple of AA batteries. Yeah, it can be a very competitive part. That's my point. You are limiting yourself to discussing monster CPUs that require a connection to the power line
    to run them and another one to cool them.


    GA144 fans might argue that the Willamette and the Palomino have only
    one core while the GA144 has 144, but nobody wants to program 144
    cores, if each has access to only 64 words of memory.

    Whatever. The point is cache is not required for performance. The level 1 cache in high end CPU chips keeps up with the CPU speeds. It's only the monster applications that require more memory than this.

    The topic here is Realtime Forth. When was the last time you saw a Forth program that needed GB of memory for the program?

    Why are you arguing this? What is your point?

    --

    Rick C.

    -++ Get 1,000 miles of free Supercharging
    -++ Tesla referral code - https://ts.la/richard11209

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  • From Lorem Ipsum@21:1/5 to minf...@arcor.de on Wed Dec 21 13:19:10 2022
    On Wednesday, December 21, 2022 at 1:55:26 PM UTC-5, minf...@arcor.de wrote:
    gnuarm.del...@gmail.com schrieb am Mittwoch, 21. Dezember 2022 um 18:26:50 UTC+1:
    I'm not sure what you are getting at. The topic of this thread is Forth real time systems.
    You made a statement that I asked for clarification on, and now you are branching the discussion.
    What are you trying to discuss?
    Isn't it obvious?

    No, not at all!


    Try to build a RT Forth on a DSP alone.

    Why? Forth has been done on DSP chips.


    IOW classic Forth multitasking
    is monolithic.

    I have no idea what you mean by "monolithic" in this context.


    When it was invented, multicores and distributed systems (outside big frames) did not exist yet. For synchronized realtime apps between different CPUs on a MCU board,
    let alone networked (sub)systems, you need sync and inter-CPU communication mechanisms
    (even if it is only a common beat or watchdog hardware line).

    How did this jump to multi-CPU boards?


    For big distributed systems Golangs goroutines went into the right direction. For small systems
    Forth can be excellent, but it is missing many things for practical realtime apps on board level.

    Such as???


    I don't mean single-CPU Arduinos and the like here.

    Sorry, I have no idea what you are trying to say. I'm not entirely sure you do either.

    --

    Rick C.

    +-- Get 1,000 miles of free Supercharging
    +-- Tesla referral code - https://ts.la/richard11209

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