As this is also referential to the late Dr. Ting, whose "Footsteps" inspires my[..]
current project, I ask the following question:
Does the existence of the Novix machines make other Forth implementations[..]
a simulation?
Unless there was a predecessor to what Moore did, the Novix reduction to practice rendered every other Forth system a simulation.
I should also point out that "mere" is doing a lot work in that sentence.Does the existence of the Novix machines make other Forth implementations a simulation? If so, does this extend to all TILs?Does the existence of integrated circuits make all the „discrete” electronic
circuits a mere simulation of ICs?
On Saturday, August 13, 2022 at 7:03:38 PM UTC+2, jchi...@gmail.com wrote:Nice.
As this is also referential to the late Dr. Ting, whose "Footsteps" inspires my[..]
current project, I ask the following question:
Does the existence of the Novix machines make other Forth implementations a simulation?[..]
Unless there was a predecessor to what Moore did, the Novix reduction to practice rendered every other Forth system a simulation.I think you have it backwards.
Does the existence of industrial robots make (some) human beings a simulation?
Maybe it could be argued in case of a Turing machine.
-marcel
I think in a sense it does.Does the existence of the Novix machines make other Forth implementations a simulation? If so, does this extend to all TILs?Does the existence of integrated circuits make all the „discrete” electronic
circuits a mere simulation of ICs?
Does the existence of the Novix machines make other Forth implementations a simulation? If so, does this extend to all TILs?
On Saturday, August 13, 2022 at 11:24:42 AM UTC-7, Zbig wrote:If so, does this extend to all TILs?
Does the existence of the Novix machines make other Forth implementations a simulation?
Does the existence of integrated circuits make all the „discrete” electronicI should also point out that "mere" is doing a lot work in that sentence.
circuits a mere simulation of ICs?
Where is the implementation in VHDL / Verilog as an alternative.
I assume this would not be the real thing either????
But I can execute something there on an FPGA?
On Saturday, 13 August 2022 at 19:33:35 UTC+1, jchi...@gmail.com wrote:
On Saturday, August 13, 2022 at 11:24:42 AM UTC-7, Zbig wrote:If so, does this extend to all TILs?
Does the existence of the Novix machines make other Forth implementations a simulation?
I am not sure what the basis of this discussion is.Does the existence of integrated circuits make all the „discrete” electronicI should also point out that "mere" is doing a lot work in that sentence.
circuits a mere simulation of ICs?
Who owns a NOVIX NC4000?
Where can I buy one?
Is there a NOVIX simulator somewhere, online, done in Javascript?
Or for download to execute on my PC / RPI, else ?
Where is the implementation in VHDL / Verilog as an alternative.
I assume this would not be the real thing either????
But I can execute something there on an FPGA?
Thinking about it a bit more in this context, no. Because there is no intermediate form for such a hardware implementation, i.e. it's not a language.Does the existence of the Novix machines make other Forth implementations a simulation? If so, does this extend to all TILs?Does the existence of integrated circuits make all the „discrete” electronic
circuits a mere simulation of ICs?
Jurgen Pitaske <jpit...@gmail.com> writes:
Where is the implementation in VHDL / Verilog as an alternative.
I assume this would not be the real thing either????
But I can execute something there on an FPGA?
There is the J1. But even an actual silicon Novix 4000 may only be a simulation, of the conjectured elementary "Forth particle" that
triggered the Big Bang. It is supposed to be the source of all
computation in the Universe.
On Saturday, August 13, 2022 at 7:03:38 PM UTC+2, jchi...@gmail.com wrote:
As this is also referential to the late Dr. Ting, whose "Footsteps" inspires my[..]
current project, I ask the following question:
Does the existence of the Novix machines make other Forth implementations[..]
a simulation?
Unless there was a predecessor to what Moore did, the Novix reduction to
practice rendered every other Forth system a simulation.
I think you have it backwards.
Does the existence of industrial robots make (some) human beings a simulation?
As this is also referential to the late Dr. Ting, whose "Footsteps" inspires my current project, I ask the following question:
"... what an innovation is the parallel bus architecture."
Does the existence of the Novix machines make other Forth implementations a simulation? If so, does this extend to all TILs?
I'm sure there other machines whose instruction sets don't need an assemble/link/load phase, but I can't think of one right now.
Unless there was a predecessor to what Moore did, the Novix reduction to practice rendered every other Forth system a simulation.
On Saturday, 13 August 2022 at 18:03:38 UTC+1, jchi...@gmail.com wrote:
As this is also referential to the late Dr. Ting, whose "Footsteps" inspires my current project, I ask the following question:
"... what an innovation is the parallel bus architecture."Ting's book this is related to https://www.amazon.co.uk/gp/product/B06X6JGM5L/ref=dbs_a_def_rwt_bibl_vppi_i21
Does the existence of the Novix machines make other Forth implementations a simulation? If so, does this extend to all TILs?
I'm sure there other machines whose instruction sets don't need an assemble/link/load phase, but I can't think of one right now.
Unless there was a predecessor to what Moore did, the Novix reduction to practice rendered every other Forth system a simulation.
Does the existence of the Novix machines make other Forth implementations a simulation?
Unless there was a predecessor to what Moore did, the Novix reduction to practice rendered every other Forth system a simulation.
Jeff Chimene <jchi...@gmail.com> writes:
Does the existence of the Novix machines make other Forth implementations a simulation?The Novix NC4016 is a CPU with an instruction set where some
instructions correspond 1:1 with some Forth words. Chuck Moore's more
recent CPU cores (e.g., c18) have an even stronger correspondence.
However, Forth is a programming language, while Novix and c18 are CPU
(cores) and there are a number of things in Forth that go beyond what
CPU cores offer. E.g., the Forth words IF and THEN cooperate and
compile a conditional branch from the IF to the THEN; there is nothing
like THEN in the Novix or C18.
Concerning the fact that there parts of Forth that have a 1:1
correspondence to Novix or c18 instructions: I think there are also a
number of PDP-11, VAX, 68000, or MSP430 instructions that correspond
1:1 with some Forth words in a native-code system; does not really
help much. You can write a simple (machine-Forth-like) Forth system
that compiles many primitives to a fixed sequence of bytes, and it
does not matter whether the bytes are part of one or several
instructions (as Chuck Moore himself demonstrated with the 386 port of machine Forth).
Unless there was a predecessor to what Moore did, the Novix reduction to practice rendered every other Forth system a simulation.Forth systems implement (a variant of) the Forth programming language;
they don't simulate the Novix NC 4016.
- anton
--
M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html
New standard: https://forth-standard.org/
EuroForth 2022: https://euro.theforth.net
Jeff Chimene <jchi...@gmail.com> writes:
Does the existence of the Novix machines make other Forth implementations a simulation?The Novix NC4016 is a CPU with an instruction set where some
instructions correspond 1:1 with some Forth words. Chuck Moore's more
recent CPU cores (e.g., c18) have an even stronger correspondence.
However, Forth is a programming language, while Novix and c18 are CPU (cores) and there are a number of things in Forth that go beyond what
CPU cores offer. E.g., the Forth words IF and THEN cooperate and
compile a conditional branch from the IF to the THEN; there is nothing
like THEN in the Novix or C18.
Concerning the fact that there parts of Forth that have a 1:1
correspondence to Novix or c18 instructions: I think there are also a
number of PDP-11, VAX, 68000, or MSP430 instructions that correspond
1:1 with some Forth words in a native-code system; does not really
help much. You can write a simple (machine-Forth-like) Forth system
that compiles many primitives to a fixed sequence of bytes, and it
does not matter whether the bytes are part of one or several
instructions (as Chuck Moore himself demonstrated with the 386 port of machine Forth).
Unless there was a predecessor to what Moore did, the Novix reduction to practice rendered every other Forth system a simulation.Forth systems implement (a variant of) the Forth programming language;
they don't simulate the Novix NC 4016.
- anton
--
M. Anton Ertl http://www.complang.tuwien.ac.at/anton/home.html comp.lang.forth FAQs: http://www.complang.tuwien.ac.at/forth/faq/toc.html New standard: https://forth-standard.org/
EuroForth 2022: https://euro.theforth.net
On Saturday, August 13, 2022 at 7:03:38 PM UTC+2, jchi...@gmail.com wrote:
Does the existence of the Novix machines make other Forth implementations a simulation?This is almost correct. But the correct term is "Virtual Machine".
This is from "Forth Programmer's Handbook" by Conklin & Rather:
"A running Forth system presents to the programmer a virtual machine (VM), like a processor.
It has two push-down stacks, code and data space, an Arithmetic Logic Unit (ALU) that executes
instructions, and several registers."
The Novix does not need to implement the VM in software because it is already available as hardware.
Henry
Does the existence of the Novix machines make other Forth implementations a simulation?
The Novix does not need to implement the VM in software because it is already available as hardware.
HenryThat's the answer. All other Forth implementations have always been virtual machines.
The Novix does not need to implement the VM in software because it is already available as hardware.
The answer is false. Why?HenryThat's the answer. All other Forth implementations have always been virtual machines.
Because it was not these "simulations" that tried to imitate Novix, but the opposite was true: it was Novix that was modeled on these "simulations".
The distinction I'm trying to define is that For=
th has always been implemented as a language, requiring compilation to a ta= >rget architecture. In the case of the Novix chips and their descendants, th= >ere is no such intermediate compilation required.
Jeff Chimene <jchi...@gmail.com> writes:
The distinction I'm trying to define is that For=But there is: cmForth. Without cmForth you have to program the Novix
th has always been implemented as a language, requiring compilation to a ta= >rget architecture. In the case of the Novix chips and their descendants, th= >ere is no such intermediate compilation required.
as binary code. Chuck Moore went that way some years later for a
time, but he did not use the name "Forth" for what he did at the time.
The software he worked on was OKAD.
- anton
AFAICT, the situation with cmForth is the same as AppForth for the RTX2001A. AppForth is capable of generating a ROM image using Turbo-C's MS-DOS I/O services. That image, loaded to ROM will be used by the RTX2001A .
I think your point is that without a Virtual Machine, one would need a front panel (in the absence of boot ROM or some such input) device to boot an Actual Machine?
Jeff Chimene <jchi...@gmail.com> writes:
AFAICT, the situation with cmForth is the same as AppForth for the RTX2001A. AppForth is capable of generating a ROM image using Turbo-C's MS-DOS I/O services. That image, loaded to ROM will be used by the RTX2001A .AFAIK, cmForth is a regular, interactive Forth system, not a
cross-compiler.
Jeff Chimene <jchi...@gmail.com> writes:
AFAICT, the situation with cmForth is the same as AppForth for the RTX2001A. AppForth is capable of generating a ROM image using Turbo-C's MS-DOS I/O services. That image, loaded to ROM will be used by the RTX2001A .AFAIK, cmForth is a regular, interactive Forth system, not a
cross-compiler.
I think your point is that without a Virtual Machine, one would need a front panel (in the absence of boot ROM or some such input) device to boot an Actual Machine?What I mean is that without a Forth system like cmForth, you program
the Novix not by writing, e.g.
: squared dup + ;
but by writing some Novix machine code in, say, octal; e.g.
123456 , 654321 , 543210 , \ completely made up
if you input the machine code in a Forth-like syntax.
And yes, you
would need some way to get that into the machine, but that's not my
point.
And in particular for the Novix NC4016, the machine code of even
simple words like + is not a 1:1 mapping of the source code: Take a
look at the following code from <https://github.com/ForthHub/cmFORTH/blob/combined/cmforth.fth> (I
left the shadow screen away to stay withing line length conventions,
but you can look at it by following the link):
It tells a lot about the distance between Forth and Novix machine code
that I cannot easily tell from the code above to what machine code
cmForth compiles a "+" if it does not combine it with anything else,
and what kinds of combinations are possible.
Concerning virtual machines: The classical threaded-code Forth systems
were implemented with techniques that I call virtual-machine
interpreters: In these systems the source code is compiled to
threaded-code, and you can consider the threaded code consisting of virtual-machine instructions. E.g., IF is compiled to ?BRANCH
followed by the target address; THEN sets the target address of the corresponding IF.
But for simple native-code systems, there is no virtual-machine interpreter and nothing else that I would call a virtual machine.
But for simple native-code systems, there is no virtual-machine interpreter and nothing else that I would call a virtual machine.
But native-code systems still pretend to have a Virtual Machine when you write >high level Forth code. For example, you can define
: squared dup + ;
although the underlying i386 processor does not know what DUP means.
On Sunday, August 14, 2022 at 9:49:24 AM UTC-7, Anton Ertl wrote:
Concerning virtual machines: The classical threaded-code Forth systems
were implemented with techniques that I call virtual-machine
interpreters: In these systems the source code is compiled to
threaded-code, and you can consider the threaded code consisting of
virtual-machine instructions. E.g., IF is compiled to ?BRANCH
followed by the target address; THEN sets the target address of the
corresponding IF.
This looks like fig-forth?
I've also seen the term "indirect threaded code interpreter" applied to such.
But for simple native-code systems, there is no virtual-machine interpreter and nothing else that I would call a virtual machine.
I don't understand why they wouldn't be virtual. The instructions executed are those of the host machine, aren't they?
To be clear, are you disagreeing with the earlier quote from "Forth Programmer's Handbook"?
Heinrich Hohl <hheinri...@gmail.com> writes:
But native-code systems still pretend to have a Virtual Machine when you write
high level Forth code. For example, you can define
: squared dup + ;
although the underlying i386 processor does not know what DUP means.DUP is a Forth word. I see no point in introducing the concept of a
virtual machine to explain it.
On Sunday, August 14, 2022 at 5:09:15 PM UTC-4, Anton Ertl wrote:
Heinrich Hohl <hheinri...@gmail.com> writes:
But native-code systems still pretend to have a Virtual Machine when you writeDUP is a Forth word. I see no point in introducing the concept of a
high level Forth code. For example, you can define
: squared dup + ;
although the underlying i386 processor does not know what DUP means.
virtual machine to explain it.
Huh? Forth *is* a virtual stack processor.
What I find annoying is that every stack processor is termed a "Forth" CPU.
Stack processors predated Forth.
Agreed. That's why I'd like to investigating the RTX2001A. It has a much better Forth (AppForth) for this purpose. It also uses the embedded machine code technique, but it's better structured, IMO.
On 15/08/2022 13:50, Rick C wrote:
On Sunday, August 14, 2022 at 5:09:15 PM UTC-4, Anton Ertl wrote:
Heinrich Hohl <hheinri...@gmail.com> writes:
But native-code systems still pretend to have a Virtual Machine when you writeDUP is a Forth word. I see no point in introducing the concept of a
high level Forth code. For example, you can define
: squared dup + ;
although the underlying i386 processor does not know what DUP means.
virtual machine to explain it.
Huh? Forth *is* a virtual stack processor.
What I find annoying is that every stack processor is termed a "Forth" CPU.Is it?
Stack processors predated Forth.
Both are just labels. Just as a plant cares nothing for the taxonomy humans have placed upon it, so it may be with CPU's :)FWIW, See https://users.ece.cmu.edu/~koopman/stack_computers/stack_computers_book.pdf
On Saturday, 13 August 2022 at 19:33:35 UTC+1, jchi...@gmail.com wrote:
On Saturday, August 13, 2022 at 11:24:42 AM UTC-7, Zbig wrote:If so, does this extend to all TILs?
Does the existence of the Novix machines make other Forth implementations a simulation?
I am not sure what the basis of this discussion is.Does the existence of integrated circuits make all the „discrete” electronicI should also point out that "mere" is doing a lot work in that sentence.
circuits a mere simulation of ICs?
Who owns a NOVIX NC4000?
Where can I buy one?
Is there a NOVIX simulator somewhere, online, done in Javascript?
Or for download to execute on my PC / RPI, else ?
Where is the implementation in VHDL / Verilog as an alternative.
I assume this would not be the real thing either????
But I can execute something there on an FPGA?
As this is also referential to the late Dr. Ting, whose "Footsteps" inspires my current project, I ask the following question:
"... what an innovation is the parallel bus architecture."
Does the existence of the Novix machines make other Forth implementations a simulation? If so, does this extend to all TILs?
I'm sure there other machines whose instruction sets don't need an assemble/link/load phase, but I can't think of one right now.
Unless there was a predecessor to what Moore did, the Novix reduction to practice rendered every other Forth system a simulation.
On Saturday, August 13, 2022 at 1:03:38 PM UTC-4, jchi...@gmail.com wrote:designers have the luxury of changing the rules of the game, and it is indeed just a game. Success goes up with experience, mostly because you learn to identify trouble before it's too late (or afterward).
As this is also referential to the late Dr. Ting, whose "Footsteps" inspires my current project, I ask the following question:
"... what an innovation is the parallel bus architecture."I would say that every other Forth system might be a product of the designer's imagination that in modern times might be expressed and simulated via Icarus Verilog before attempting a fit to available silicon.
Does the existence of the Novix machines make other Forth implementations a simulation? If so, does this extend to all TILs?
I'm sure there other machines whose instruction sets don't need an assemble/link/load phase, but I can't think of one right now.
Unless there was a predecessor to what Moore did, the Novix reduction to practice rendered every other Forth system a simulation.
Even on a hobby budget, one might progress from one project to another in the quest for the "ultimate" Forth CPU. Ancestor worship only gets you so far. One might learn and go beyond (as any benevolent ancestor like my pappy would encourage). CPU
Some kind of object code assembler is required to generate the binaries for simulation test, and eventually, application code. I have found Python3 to be *very* convenient for that purpose despite the fact that the target CPU is a dual-stack machinethat knows nothing of the Python this-or-that involved in generating said code.
I have a special interest in Forth CPU design that accelerates DSP apps. Below is a generic FFT for the fx32i CPU. Assuming zero wait state RAM, a simulated 512-point solution (cp(fft)) executes in 313813 clock cycles (max clock frequency unknown). Ihave no idea how competitive this is with any existing 512-point FFT benchmarks.
On Saturday, September 3, 2022 at 10:54:12 AM UTC-4, Myron Plichota wrote:designers have the luxury of changing the rules of the game, and it is indeed just a game. Success goes up with experience, mostly because you learn to identify trouble before it's too late (or afterward).
On Saturday, August 13, 2022 at 1:03:38 PM UTC-4, jchi...@gmail.com wrote:
As this is also referential to the late Dr. Ting, whose "Footsteps" inspires my current project, I ask the following question:
"... what an innovation is the parallel bus architecture."I would say that every other Forth system might be a product of the designer's imagination that in modern times might be expressed and simulated via Icarus Verilog before attempting a fit to available silicon.
Does the existence of the Novix machines make other Forth implementations a simulation? If so, does this extend to all TILs?
I'm sure there other machines whose instruction sets don't need an assemble/link/load phase, but I can't think of one right now.
Unless there was a predecessor to what Moore did, the Novix reduction to practice rendered every other Forth system a simulation.
Even on a hobby budget, one might progress from one project to another in the quest for the "ultimate" Forth CPU. Ancestor worship only gets you so far. One might learn and go beyond (as any benevolent ancestor like my pappy would encourage). CPU
that knows nothing of the Python this-or-that involved in generating said code.Some kind of object code assembler is required to generate the binaries for simulation test, and eventually, application code. I have found Python3 to be *very* convenient for that purpose despite the fact that the target CPU is a dual-stack machine
have no idea how competitive this is with any existing 512-point FFT benchmarks.I have a special interest in Forth CPU design that accelerates DSP apps. Below is a generic FFT for the fx32i CPU. Assuming zero wait state RAM, a simulated 512-point solution (cp(fft)) executes in 313813 clock cycles (max clock frequency unknown). I
If you want a fast FFT, you need a pair of multipliers and a pair of adders. This can be the basis of a butterfly processor. Then you can replicate this unit multiple times to process as many butterflies per second as you wish.technology moved so quickly, that general processors would outpace the custom designs in short order.
There may be memory bottle necks. This works best if you have local fast memory and can move data to and from non-local memory fast enough to not slow the sequencing of the butterfly units. This has all been done before. In the end, processing
I suppose it is pointless to ask what the application is? How fast do you need to process FFTs?a variety of tasks.
I will mention that in general, a stack processor is not a good match to DSP that I've seen. Register files make things better, but the Forth benchmarks are always for a single test case (such as this FFT) while real DSP chips are called on to process
--I appreciate your ideas. Indeed true (e.g. Analog Devices Blackfin) DSPs demonstrate those precepts. However, fx32i is a von Neumann machine with the bottleneck of unified code/data/io space (4Gbytes). The multislot instruction format and instruction
Rick C.
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