• Question: The smallest cheapest part to act as a pallet/buffer for vide

    From Wayne morellini@21:1/5 to All on Sat Jul 16 09:19:20 2022
    I've got a side application requiring conversion of video signals,
    and a second requiring buffering.

    Anybody know of parts that may do this?

    An low count FPGA might, but are not likely to run off the power
    from the video, scart or RGB port.

    Thanks.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Rick C@21:1/5 to Wayne morellini on Sat Jul 16 09:35:32 2022
    On Saturday, July 16, 2022 at 12:19:21 PM UTC-4, Wayne morellini wrote:
    I've got a side application requiring conversion of video signals,
    and a second requiring buffering.

    Anybody know of parts that may do this?

    An low count FPGA might, but are not likely to run off the power
    from the video, scart or RGB port.

    How much power is available from these sources?

    What do you mean you need "buffering", exactly? What are the inputs, outputs and functionality in the middle?

    Why does this need buffering? Is video coming in from a network where it is not a continuous signal?

    --

    Rick C.

    - Get 1,000 miles of free Supercharging
    - Tesla referral code - https://ts.la/richard11209

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Wayne morellini@21:1/5 to gnuarm.del...@gmail.com on Sat Jul 16 10:17:30 2022
    On Sunday, July 17, 2022 at 2:35:34 AM UTC+10, gnuarm.del...@gmail.com wrote:
    On Saturday, July 16, 2022 at 12:19:21 PM UTC-4, Wayne morellini wrote:
    I've got a side application requiring conversion of video signals,
    and a second requiring buffering.

    Anybody know of parts that may do this?

    An low count FPGA might, but are not likely to run off the power
    from the video, scart or RGB port.
    How much power is available from these sources?

    What do you mean you need "buffering", exactly? What are the inputs, outputs and functionality in the middle?

    Thank you Rick.

    On 1 functional level, live transformation of the pixel.

    On a 2nd functional level buffering of lines of pixels.

    On a 3rd functional level buffering of frames and fields.
    Frame buffering.

    All transforms live pixel video feeds.

    Inputs and outputs are those video port standards.

    A part only needs to support at least one of these to be useful.

    Exact functonality is a commercial secret, but involves correcting
    of video signal levels and phase, and other data functions .


    Why does this need buffering? Is video coming in from a network where it is not a continuous signal?

    --

    Rick C.

    - Get 1,000 miles of free Supercharging
    - Tesla referral code - https://ts.la/richard11209

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Rick C@21:1/5 to Wayne morellini on Sat Jul 16 11:16:55 2022
    On Saturday, July 16, 2022 at 1:17:31 PM UTC-4, Wayne morellini wrote:
    On Sunday, July 17, 2022 at 2:35:34 AM UTC+10, gnuarm.del...@gmail.com wrote:
    On Saturday, July 16, 2022 at 12:19:21 PM UTC-4, Wayne morellini wrote:
    I've got a side application requiring conversion of video signals,
    and a second requiring buffering.

    Anybody know of parts that may do this?

    An low count FPGA might, but are not likely to run off the power
    from the video, scart or RGB port.
    How much power is available from these sources?

    What do you mean you need "buffering", exactly? What are the inputs, outputs and functionality in the middle?
    Thank you Rick.

    On 1 functional level, live transformation of the pixel.

    On a 2nd functional level buffering of lines of pixels.

    On a 3rd functional level buffering of frames and fields.
    Frame buffering.

    All transforms live pixel video feeds.

    Inputs and outputs are those video port standards.

    A part only needs to support at least one of these to be useful.

    Exact functonality is a commercial secret, but involves correcting
    of video signal levels and phase, and other data functions .

    Why does this need buffering? Is video coming in from a network where it is not a continuous signal?

    What you describe is not just "video buffering". You wish to do transformations on the images, so you need to have a full buffer to work with. Fair enough.

    You didn't answer the question about how much power is available. Do you know?

    --

    Rick C.

    + Get 1,000 miles of free Supercharging
    + Tesla referral code - https://ts.la/richard11209

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Wayne morellini@21:1/5 to gnuarm.del...@gmail.com on Sat Jul 16 21:08:05 2022
    On Sunday, July 17, 2022 at 4:16:57 AM UTC+10, gnuarm.del...@gmail.com wrote:
    On Saturday, July 16, 2022 at 1:17:31 PM UTC-4, Wayne morellini wrote:
    On Sunday, July 17, 2022 at 2:35:34 AM UTC+10, gnuarm.del...@gmail.com wrote:
    On Saturday, July 16, 2022 at 12:19:21 PM UTC-4, Wayne morellini wrote:
    I've got a side application requiring conversion of video signals,
    and a second requiring buffering.

    Anybody know of parts that may do this?

    An low count FPGA might, but are not likely to run off the power
    from the video, scart or RGB port.
    How much power is available from these sources?

    What do you mean you need "buffering", exactly? What are the inputs, outputs and functionality in the middle?
    Thank you Rick.

    On 1 functional level, live transformation of the pixel.

    On a 2nd functional level buffering of lines of pixels.

    On a 3rd functional level buffering of frames and fields.
    Frame buffering.

    All transforms live pixel video feeds.

    Inputs and outputs are those video port standards.

    A part only needs to support at least one of these to be useful.

    Exact functonality is a commercial secret, but involves correcting
    of video signal levels and phase, and other data functions .

    Why does this need buffering? Is video coming in from a network where it is not a continuous signal?
    What you describe is not just "video buffering". You wish to do transformations on the images, so you need to have a full buffer to work with. Fair enough.

    You didn't answer the question about how much power is available. Do you know?

    --

    Rick C.

    + Get 1,000 miles of free Supercharging
    + Tesla referral code - https://ts.la/richard11209

    No, have found voltages but not current. I presume there might be enough current to use without degrading the signal much (hence need lowest energy device). But maybe that's a bit naive, and complicated.


    VGA, has some dedicated lines for data and monitor awake functions.

    I'm buffering in order to change signal. Even without buffer I change luminance and chrominance to be cleaner and make the image cleaner and tighter. With just a line buffer I can use it to compare to the next line and do more. However, some of that
    requires converting up into a better connector (where HDMI is going become complex , and in any case, will likely need to be powered). So, really an extra level of functonality.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Rick C@21:1/5 to Wayne morellini on Sat Jul 16 21:37:22 2022
    On Sunday, July 17, 2022 at 12:08:07 AM UTC-4, Wayne morellini wrote:
    On Sunday, July 17, 2022 at 4:16:57 AM UTC+10, gnuarm.del...@gmail.com wrote:
    On Saturday, July 16, 2022 at 1:17:31 PM UTC-4, Wayne morellini wrote:
    On Sunday, July 17, 2022 at 2:35:34 AM UTC+10, gnuarm.del...@gmail.com wrote:
    On Saturday, July 16, 2022 at 12:19:21 PM UTC-4, Wayne morellini wrote:
    I've got a side application requiring conversion of video signals, and a second requiring buffering.

    Anybody know of parts that may do this?

    An low count FPGA might, but are not likely to run off the power from the video, scart or RGB port.
    How much power is available from these sources?

    What do you mean you need "buffering", exactly? What are the inputs, outputs and functionality in the middle?
    Thank you Rick.

    On 1 functional level, live transformation of the pixel.

    On a 2nd functional level buffering of lines of pixels.

    On a 3rd functional level buffering of frames and fields.
    Frame buffering.

    All transforms live pixel video feeds.

    Inputs and outputs are those video port standards.

    A part only needs to support at least one of these to be useful.

    Exact functonality is a commercial secret, but involves correcting
    of video signal levels and phase, and other data functions .

    Why does this need buffering? Is video coming in from a network where it is not a continuous signal?
    What you describe is not just "video buffering". You wish to do transformations on the images, so you need to have a full buffer to work with. Fair enough.

    You didn't answer the question about how much power is available. Do you know?

    --

    Rick C.

    + Get 1,000 miles of free Supercharging
    + Tesla referral code - https://ts.la/richard11209
    No, have found voltages but not current. I presume there might be enough current to use without degrading the signal much (hence need lowest energy device). But maybe that's a bit naive, and complicated.


    VGA, has some dedicated lines for data and monitor awake functions.

    I'm buffering in order to change signal. Even without buffer I change luminance and chrominance to be cleaner and make the image cleaner and tighter. With just a line buffer I can use it to compare to the next line and do more. However, some of that
    requires converting up into a better connector (where HDMI is going become complex , and in any case, will likely need to be powered). So, really an extra level of functonality.

    Ok, if no power budget, what's your price target for the device? How about the FPGA? Have you estimated the size of the design so that you have an idea of the chip size you need? Do you have a development budget?

    --

    Rick C.

    -- Get 1,000 miles of free Supercharging
    -- Tesla referral code - https://ts.la/richard11209

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Wayne morellini@21:1/5 to Wayne morellini on Sun Jul 17 06:23:51 2022
    It's one of those things I
    considered briefly in the past and last night thought to ask
    on the spare of the moment.

    The different functions are
    different levels of product,
    with whatever dozens of
    features can fit. So, it
    spreads out, depending on
    which level of implementation is used. So,
    it's a matter of what the
    lowest energy parts can do,
    and go from there, to
    estimate what fits.

    As far as the fpga resources. I
    don't know. I'll talk in terms
    of instructions, but if the right
    part did most of it, then you
    are talking extremely small
    counts on fpga, up to 1000's
    of times more to do the more
    complex stuff on frame
    buffers.

    The minimum is: capture
    value, test convert by set
    adjustment (some systems
    have predictable noise
    patterns so position
    becomes important) send, to
    full buffer. Depending on the
    part features that could be
    100's of instructions, tens of
    instructions. A simple level
    shift is next to nothing, and
    could be done by analogue. I
    want something that barely
    sticks out of the socket.


    Line buffering is at least
    hundreds of bytes extra. As
    far as functions, maybe still
    hundreds of bytes.

    On full buffers, we might
    speak of VGA, or SD, 8-16 bit
    output. 8 bit is probably
    going be enough, but even 24
    bit has use. So, 256KB-
    512KB, 768, 320-960 or more
    SD pal. Even a number of
    megabytes.

    However, just to keep it at a
    minimum: 10KB-512KB
    maybe.

    Now. The instructions. 100's
    of bytes to Hundreds of
    kilobytes. Just to start
    simple more advanced
    functonality can be left out.
    Hmm, I'm wondering about
    those video over twisted pair
    schemes, running into an
    HDMI adaptor. Looking at it
    that way, I could put the
    device TV side, where it
    would matter less having
    extra power cables (probably
    off of a USB socket, not
    HDMI). Stepping back, USB
    to HDMI cable. But then we
    are desiring the circuit on the tv side, meaning using USB to
    USB to HDMI. So, an option
    is a chip with USB capability
    the resampled image could
    be put through. But, then, you
    are paying for two pieces of
    kit, or licensing. Getting too
    complex and costly.

    So, $40 retail on Amazon is
    desirable. $20 better.
    However, keeping it really
    simple means construction
    costs of dollars or less than
    $1. The most complex
    feature set, maybe to
    expensive. You may reach a
    million devices with the most
    complex feature set, maybe
    10,000+ without. The
    numbers don't seem to add
    up, they are too much an
    ideal situation. But starting
    with the incredibly low end
    maybe. But, for all I know,
    there might be some
    incredibly small, cheap, low
    energy chip out there, with
    one to three ADC's which can
    handle video rates, and
    512KB. 15+ years ago, the
    numbers could have been
    more assured, but only an
    intellisys chip would be
    cheap enough, and you could
    charge maybe $100.

    Having a good think about it,
    substantial capability for the
    10,000+ market is perhaps
    bytes or tens of bytes, plus
    equivalent to tens to
    hundreds of instructions,
    depending on part ability. If
    only there was a single core
    misc chip out there with
    substantive memory. I could
    do a fair bit more.

    Once suitable parts are
    figured out, then the way
    forwards, then development
    budget. But just testing it
    out, to see, is a first step. It's
    not terribly sophisticated in
    it's basic forms. It's more a
    hobby, until it looks
    productive. The other chip
    looks a productive thing to
    pursue and requiring
    substantial pre-preparation.
    I'm literally going have to
    decide what to do there, what
    can be done, and learn
    everything I need to do it.
    With that design. This would
    be a cake walk. That's
    designed to be stuck
    anywhere in any basic job to
    a computer cluster.

    Pity Jeff left us, and had so
    much trouble in the end. I
    was really waiting for his
    chip.

    It's just amazing nobody has
    an p16 like ASIC to show.
    Been looking over the 1 bit
    serial CPU of the guy who did
    the j1 and h2. He seems a
    productive person. It's a
    shame he didn't have
    anything in custom silicon
    out from anybody. I would
    have thought somebody like
    ST would have something,
    you hear of a number of
    unnusual parts from them
    over the years.

    Anyway, another several hours
    then the drain (just did
    another email and laid out a
    render engine, which is pretty
    interesting. Sort of mixture
    of previous plans and stuff
    for a new target).


    Thank you.


    On Sun, 17 Jul 2022, 14:37 Rick C, <gnuarm.deletethisbit@gmail.com> wrote:
    On Sunday, July 17, 2022 at 12:08:07 AM UTC-4, Wayne morellini wrote:
    On Sunday, July 17, 2022 at 4:16:57 AM UTC+10, gnuarm.del...@gmail.com wrote:
    On Saturday, July 16, 2022 at 1:17:31 PM UTC-4, Wayne morellini wrote:
    On Sunday, July 17, 2022 at 2:35:34 AM UTC+10, gnuarm.del...@gmail.com wrote:
    On Saturday, July 16, 2022 at 12:19:21 PM UTC-4, Wayne morellini wrote:
    I've got a side application requiring conversion of video signals, and a second requiring buffering.

    Anybody know of parts that may do this?

    An low count FPGA might, but are not likely to run off the power
    from the video, scart or RGB port.
    How much power is available from these sources?

    What do you mean you need "buffering", exactly? What are the inputs, outputs and functionality in the middle?
    Thank you Rick.

    On 1 functional level, live transformation of the pixel.

    On a 2nd functional level buffering of lines of pixels.

    On a 3rd functional level buffering of frames and fields.
    Frame buffering.

    All transforms live pixel video feeds.

    Inputs and outputs are those video port standards.

    A part only needs to support at least one of these to be useful.

    Exact functonality is a commercial secret, but involves correcting
    of video signal levels and phase, and other data functions .

    Why does this need buffering? Is video coming in from a network where it is not a continuous signal?
    What you describe is not just "video buffering". You wish to do transformations on the images, so you need to have a full buffer to work with. Fair enough.

    You didn't answer the question about how much power is available. Do you know?

    --

    Rick C.

    + Get 1,000 miles of free Supercharging
    + Tesla referral code - https://ts.la/richard11209
    No, have found voltages but not current. I presume there might be enough current to use without degrading the signal much (hence need lowest energy device). But maybe that's a bit naive, and complicated.


    VGA, has some dedicated lines for data and monitor awake functions.

    I'm buffering in order to change signal. Even without buffer I change luminance and chrominance to be cleaner and make the image cleaner and tighter. With just a line buffer I can use it to compare to the next line and do more. However, some of that
    requires converting up into a better connector (where HDMI is going become complex , and in any case, will likely need to be powered). So, really an extra level of functonality.

    Ok, if no power budget, what's your price target for the device? How about the FPGA? Have you estimated the size of the design so that you have an idea of the chip size you need? Do you have a development budget?

    --

    Rick C.

    -- Get 1,000 miles of free Supercharging
    -- Tesla referral code - https://ts.la/richard11209

    --
    You received this message because you are subscribed to a topic in the Google Groups "comp.lang.forth" group.
    To unsubscribe from this topic, visit https://groups.google.com/d/topic/comp.lang.forth/S-_qe2Kh6gk/unsubscribe.
    To unsubscribe from this group and all its topics, send an email to comp.lang.forth+unsubscribe@googlegroups.com.
    To view this discussion on the web visit https://groups.google.com/d/msgid/comp.lang.forth/957ee442-4b25-4b66-b9f6-21c8cb53692an%40googlegroups.com.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Wayne morellini@21:1/5 to gnuarm.del...@gmail.com on Sun Jul 17 11:40:02 2022
    On Sunday, July 17, 2022 at 2:37:23 PM UTC+10, gnuarm.del...@gmail.com wrote:
    On Sunday, July 17, 2022 at 12:08:07 AM UTC-4, Wayne morellini wrote:
    On Sunday, July 17, 2022 at 4:16:57 AM UTC+10, gnuarm.del...@gmail.com wrote:
    On Saturday, July 16, 2022 at 1:17:31 PM UTC-4, Wayne morellini wrote:
    On Sunday, July 17, 2022 at 2:35:34 AM UTC+10, gnuarm.del...@gmail.com wrote:
    On Saturday, July 16, 2022 at 12:19:21 PM UTC-4, Wayne morellini wrote:
    I've got a side application requiring conversion of video signals, and a second requiring buffering.

    Anybody know of parts that may do this?

    An low count FPGA might, but are not likely to run off the power from the video, scart or RGB port.
    How much power is available from these sources?

    What do you mean you need "buffering", exactly? What are the inputs, outputs and functionality in the middle?
    Thank you Rick.

    On 1 functional level, live transformation of the pixel.

    On a 2nd functional level buffering of lines of pixels.

    On a 3rd functional level buffering of frames and fields.
    Frame buffering.

    All transforms live pixel video feeds.

    Inputs and outputs are those video port standards.

    A part only needs to support at least one of these to be useful.

    Exact functonality is a commercial secret, but involves correcting
    of video signal levels and phase, and other data functions .

    Why does this need buffering? Is video coming in from a network where it is not a continuous signal?
    What you describe is not just "video buffering". You wish to do transformations on the images, so you need to have a full buffer to work with. Fair enough.

    You didn't answer the question about how much power is available. Do you know?

    --

    Rick C.

    + Get 1,000 miles of free Supercharging
    + Tesla referral code - https://ts.la/richard11209
    No, have found voltages but not current. I presume there might be enough current to use without degrading the signal much (hence need lowest energy device). But maybe that's a bit naive, and complicated.


    VGA, has some dedicated lines for data and monitor awake functions.

    I'm buffering in order to change signal. Even without buffer I change luminance and chrominance to be cleaner and make the image cleaner and tighter. With just a line buffer I can use it to compare to the next line and do more. However, some of that
    requires converting up into a better connector (where HDMI is going become complex , and in any case, will likely need to be powered). So, really an extra level of functonality.
    Ok, if no power budget, what's your price target for the device? How about the FPGA? Have you estimated the size of the design so that you have an idea of the chip size you need? Do you have a development budget?

    It's one of those things I considered briefly in the past
    and last night thought to ask on the spare of the moment.

    The different functions are different levels of product,
    with whatever dozens of features can fit. So, it spreads
    out, depending on which level of implementation is used.
    So, it's a matter of what the lowest energy parts can do,
    and go from there, to estimate what fits.

    As far as the fpga resources. I don't know. I'll talk in terms
    of instructions, but if the right part did most of it, then you
    are talking extremely small counts on fpga, up to 1000's
    of times more to do the more complex stuff on frame
    buffers.

    The minimum is: capture value, test convert by set
    adjustment (some systems have predictable noise
    patterns so position becomes important) send, to
    full buffer. Depending on the part features that could be
    100's of instructions, tens of instructions. A simple level
    shift is next to nothing, and could be done by analogue. I
    want something that barely sticks out of the socket.


    Line buffering is at least hundreds of bytes extra. As
    far as functions, maybe still hundreds of bytes.

    On full buffers, we might speak of VGA, or SD, 8-16 bit
    output. 8 bit is probably going be enough, but even 24
    bit has use. So, 256KB 512KB, 768, 320-960 or more
    SD pal. Even a number of megabytes.

    However, just to keep it at a minimum: 10KB-512KB
    maybe.

    Now. The instructions. 100's of bytes to Hundreds of
    kilobytes. Just to start simple more advanced
    functonality can be left out. Hmm, I'm wondering about
    those video over twisted pair schemes, running into an
    HDMI adaptor. Looking at it that way, I could put the
    device TV side, where it would matter less having
    extra power cables (probably off of a USB socket, not
    HDMI). Stepping back, USB to HDMI cable. But then we
    are desiring the circuit on the tv side, meaning using USB to
    USB to HDMI. So, an option is a chip with USB capability
    the resampled image could be put through. But, then, you
    are paying for two pieces of kit, or licensing. Getting too
    complex and costly.

    So, $40 retail on Amazon is desirable. $20 better.
    However, keeping it really simple means construction
    costs of dollars or less than $1. The most complex
    feature set, maybe to expensive. You may reach a
    million devices with the most complex feature set, maybe
    10,000+ without. The numbers don't seem to add
    up, they are too much an ideal situation. But starting
    with the incredibly low end maybe. But, for all I know,
    there might be some incredibly small, cheap, low
    energy chip out there, with one to three ADC's which can
    handle video rates, and 512KB. 15+ years ago, the
    numbers could have been more assured, but only an
    intellisys chip would be cheap enough, and you could
    charge maybe $100.

    Having a good think about it, substantial capability for the
    10,000+ market is perhaps bytes or tens of bytes, plus
    equivalent to tens to hundreds of instructions,
    depending on part ability. If only there was a single core
    misc chip out there with substantive memory. I could
    do a fair bit more.

    Once suitable parts are figured out, then the way
    forwards, then development budget. But just testing it
    out, to see, is a first step. It's not terribly sophisticated in
    it's basic forms. It's more a hobby, until it looks
    productive. The other chip looks a productive thing to
    pursue and requiring substantial pre-preparation.
    I'm literally going have to decide what to do there, what
    can be done, and learn everything I need to do it.
    With that design. This would be a cake walk. That's
    designed to be stuck anywhere in any basic job to
    a computer cluster.

    Pity Jeff left us, and had so much trouble in the end. I
    was really waiting for his chip.

    It's just amazing nobody has an p16 like ASIC to show.
    Been looking over the 1 bit serial CPU of the guy who did
    the j1 and h2. He seems a productive person. It's a
    shame he didn't have anything in custom silicon
    out from anybody. I would have thought somebody like
    ST would have something you hear of a number of
    unnusual parts from them over the years.

    Anyway, another several hours then the drain (just did
    another email and laid out a render engine, which is pretty
    interesting. Sort of mixture of previous plans and stuff
    for a new target).


    Thank you.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Wayne morellini@21:1/5 to gnuarm.del...@gmail.com on Sun Jul 17 22:06:38 2022
    On Monday, July 18, 2022 at 1:07:51 PM UTC+10, gnuarm.del...@gmail.com wrote:
    On Sunday, July 17, 2022 at 8:11:42 PM UTC-4, Paul Rubin wrote:
    Rick C <gnuarm.del...@gmail.com> writes:
    Ok, enjoy. I think it's pretty clear now that you are an armchair designer.
    I'm not designing anything and I've never claimed to be any sort of (hardware) designer. The comment you replied to was about the compiler software. It had nothing to do with the electronics.
    That post was not to you. I'm not sure what happened, but sometimes when I reply to a post, Google Groups actually brings up a different post. That was supposed to be a reply to a post by Wayne, in another thread even. I usually catch it.

    Sorry.

    --

    Rick C.

    ---+- Get 1,000 miles of free Supercharging
    ---+- Tesla referral code - https://ts.la/richard11209


    You just 'happen' to poison the wrong thread. I was
    waiting for the penny to drop. Seeming to be helpful but
    actually doing nothing but to draw up the wrong path to do
    something. No big, long drawn out, in depth, non logo,
    design process. Disappointed.

    Again, in low energy extreme edge engineering, you start
    with the minimum that you can fit the functionality into.
    Have you done any ultra low energy engineering. You can
    only start with the lowest parts and see if they fit, and
    trim back your extra feature expectations. You may not
    find the ideal part, because it doesn't exist, like a magnetic
    processing unit with memory that dips 1 million times less
    energy, with good density going at 500mhz+, which is
    Magnetic Quantum Dot Cellular Automata, which isn't
    available. So, instead of spending time finding and
    going through tens of thousands of parts, you ask
    others what they know of, and look at those companies
    to see if they have anything better, and search their
    competitors, and search to see if anybody has mentioned
    those parts alongside even better alternatives. Bravo, you
    have done it again.

    You seem to be fairly consistent coming into my
    threads and dropping bad answers and questions.

    Now, you don't seem to realise that at different extremes of
    design things flip. You see what is available, and how
    much you can do with it, and mane a decision what to do, if
    at all.

    You are actually in agreement with the office chair
    engineering (we'll call it, so not to be deliberately
    derogative to many professional engineers, who
    do cutting edge high volume work, rather than bulky
    simplistic engineering). Where you estimate the
    numbers, different feature sets, and also see what's out
    there (maybe first) and work out if it's worth going
    forwards. You find one times out of ten, even out of a
    hundred or more, it's just not going be practical. You trim
    back your expectations until it is, if at all practical to do
    economically, or drop it. If one is really bad you can't do
    this, or find better solutions. I used to just cull through all
    the options maybe going through tens of thousands of
    aspects, to be left with just the good ones. Takes several
    hours to do. People wonder how I do it. I used to see,
    model and multipath trace simulate the functionality of
    the design in my mind. Find all the bad aspects and right
    ways to do it. You seem too trapped in this simplistic
    thing, that design happens to be physical technologies you
    use as tools to make the actual design. You can spend
    even years playing with that and never get a good design,
    just a kludge that either doesn't fit it's purpose well, or
    is not refined advancedly for
    use or production. My inspiration comes from an
    entirely different level of engineers. Who will normally
    not come to a place this, due to heel biting. Heel biters
    don't tend to get along so well working with others with
    complimentary skills better than them, and may end up
    working alone. There are a lot that start their own small
    business, as they have the energy to run some things, but
    not be MacDonald's, Apple, IBM, Musk or Walmart. You
    come across them, arrogant, tense, terse, thinking they
    should run things, and failing to ever get ahead. In reality,
    some are good leading, administering, directing,
    creating design, design, implementing design, or
    making the design. These all have to work together to
    make a good business. But people a bit of this, a bit of
    that, nothing fantastic, don't get that far.

    Energy is the issue to keep it small cheap low profile (I tend
    not to use the term power in taking to the public about
    processing designs, as people might get that
    confused with talking about performance). If you cant,
    and have to run a wire, then it automatically matters a lot
    less about energy, as you automatically have added
    bulk to the consumer device, making it less desirable to
    buy, and you could just run a variety of not so low energy
    devices in the design. You noticed many home
    computers used to have the large power brick outside the
    case, keeping it more attractive (and likely safer).
    But, when you have to actively power the device,
    that's going open up a lot of certification issues, and
    sievtrim interference issues, which may require seperate
    approvals in different countries. Something I don't
    want to get into for a non high volume, low profit
    product. If I was a person in China, and the distribution
    channels leak things overseas, that would be
    different. Magnetic parts might be an industry there to
    reduce the requirements.

    So, when you read Paul's post on a totally different subject,
    and name, to mine. You didn't notice it want my name or the
    subject I was talking about? I've noticed a few of what
    seems to be 'google messed up posts' recently.

    So, you can see. Help or not, it's all here to be seen.

    What I really need, is a one pin video mode on HDMI. If only
    it was designed more like display port, it might be easier
    to interface to cheaply and compactly.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Wayne morellini@21:1/5 to Wayne morellini on Thu Jul 21 04:30:15 2022
    On Sunday, July 17, 2022 at 2:19:21 AM UTC+10, Wayne morellini wrote:
    I've got a side application requiring conversion of video signals,
    and a second requiring buffering.

    Anybody know of parts that may do this?

    An low count FPGA might, but are not likely to run off the power
    from the video, scart or RGB port.

    Thanks.

    Ok, studied a few parts, and started thinking about using them on a bigger project, like the retro
    game watch, but I misread the amount of memory. I ran through calculations into 4am in the
    morning, but had to give up. By the time I added the extra parts , it was going over budget and
    the figures for the features where not as good.

    I'm seriously thinking of doing another campaign to propose to memory manufacturers a need
    for 1-2 pin serial memory interface standard, and an in package multiple module approach to
    get around the limitations. The interface would act like a normal bus and scale up to the
    highest speeds (23Gb/s on embedded mobile) Async/synchronous, that acts like a moral
    sram 3xecute bus (parralel conversion handled on chip). Then, every pin/pin set, could be
    a high speed transfer or memory bus. Mipi has a lot of stuff that would benefit the embedded
    industry. You could use a data line for storage or video. The trick is to have some modes,
    where you can drop back and make it act like spi or i2c. There is a parallel to serial to
    parrallel auto addressing system in i3c I think, but it's very slow. If you could make a 1-4 pin
    system, you can easily get a good execute speed for a 32bit processor.

    Anyway, thyresistor ram is multifunction and 1 transistor, and closer to sram in performance. So a good
    candidate needing a wider market. Putting normal non sram memory onto a processor
    manufacturing process is difficult. The commodity memory and commodity ram manufacturing processes are very different, and it can add costs. A memory die fine on
    its own optimised process, can be a lot cheaper. A lot of difficulty with running external
    memory at full speed compared to on the same die, is the external interface. But, once you
    pack both in the same chip you could minimise that.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jan Coombs@21:1/5 to Wayne morellini on Sat Jul 30 11:52:50 2022
    On Sun, 17 Jul 2022 06:23:51 -0700 (PDT)
    Wayne morellini <waynemorellini@gmail.com> wrote:

    On full buffers, we might
    speak of VGA, or SD, 8-16 bit
    output. 8 bit is probably
    going be enough, but even 24
    bit has use. So, 256KB-
    512KB, 768, 320-960 or more
    SD pal. Even a number of
    megabytes.


    Lattice iCE40 UltraPlus Family [5k/3k LUT4+FF].
    Open source tools (for design security).

    "In addition to the EBR, the iCE40 UltraPlus devices also feature four
    256 kb SPRAM blocks that can be cascaded to create up to 1 Mb block.
    It is useful for temporary storage of large quantities of information."

    EBR 4kb 256x16 etc, Embedded Block RAM
    SPRAM 16kb x 16 etc, Single Port RAM

    https://www.latticesemi.com/view_document?document_id=51968

    Jan Coombs

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Wayne morellini@21:1/5 to Jan Coombs on Tue Aug 2 13:30:28 2022
    On Saturday, July 30, 2022 at 8:52:57 PM UTC+10, Jan Coombs wrote:
    On Sun, 17 Jul 2022 06:23:51 -0700 (PDT)
    Wayne morellini <waynemo...@gmail.com> wrote:

    On full buffers, we might
    speak of VGA, or SD, 8-16 bit
    output. 8 bit is probably
    going be enough, but even 24
    bit has use. So, 256KB-
    512KB, 768, 320-960 or more
    SD pal. Even a number of
    megabytes.
    Lattice iCE40 UltraPlus Family [5k/3k LUT4+FF].
    Open source tools (for design security).

    "In addition to the EBR, the iCE40 UltraPlus devices also feature four
    256 kb SPRAM blocks that can be cascaded to create up to 1 Mb block.
    It is useful for temporary storage of large quantities of information."

    EBR 4kb 256x16 etc, Embedded Block RAM
    SPRAM 16kb x 16 etc, Single Port RAM

    https://www.latticesemi.com/view_document?document_id=51968

    Jan Coombs


    Thanks Jan. That's the sort of things I'm thinking. You should google spram and see
    the different storage memory definitions it gives.

    I've been continuing to explore things in time background and have made a
    lot of progress, bit nowhere near the low energy levels I'm looking at. Of course, I'm
    looking for lowest energy levels, for a few different purposes.

    However, a number of things I've said in the past here, some smarties try to drown
    out, it turns out smarter minds are also actively pursuing. Such as multiple
    chip packages in 2D or 3D using "chiplets". Intel foundry services is using. I'm
    currently struggling to keep awake watching a video on it, with yet another crazed
    sounding narrator grind away on my nerves. So, my ambition to stack a now
    "chiplet" sram like die in a multichip package with high speed die to die signaling
    (yes, the video sounds familiar) to a processor core, looks like becoming a reality
    (please note, you don't need a fan to mix and put chiplets into a multiple chip package).
    So good when reality proves the usual negative for the sake of mouthing off,
    suspects wrong.

    https://youtu.be/z89ysU4RwIg

    My thought, is that a chip like the ga144 could use such a cheap memory psram chiplet
    in package. But, I don't know how many cycles the chip takes up to perform one
    instruction cycle. I presumed a number, but realised last night, you could just sacrifice
    a few cores to synchronise a stream of memory fetches to another core. Maybe not 700mhz, but then not many
    cost effective simple external memories will go near that fast.

    I've decided as the project is likely to get 10,000 or so sales at max but needs to be below
    $40 to get those sales, I could land up doing $100k of work for $10k, so am looking
    at making it a community project using a small cheap development board. Also, due
    to possible hassles with HDMI requiring a $10k license per product, and no board
    small enough, coming with a HDMI licensed function and port, I've decided to scrap
    that and explore a lower latency version of Miracast or one of the USB video
    standards where the user buys a USB to HDMI adaptor. But also looking at a custom
    wireless or wired transmission. I could literally do HDMI over cat or optical
    instead, and basically support an embedded cable with HDMI end on it.

    Here is a Arduino wifi RiscV development board I'm checking out. It's around 21
    mm by 17mm. There are slightly smaller, but they are a lot slower, lack features, and
    wifi, avr or pic. But, there is a very small fpga board under development. There are a few
    such fpga boards. If only the chip in the seed Xia one below supported graphics and
    HDMI, it would be great. Unfortunately, it seems all the
    chips at this level lack something that could easily have been supported. At the
    moment, I'm trying to find out if the chip even has support for Miracast. I forecast a long
    time ago, that there would be such chips that would have enough resources to be used
    for more general purposes. A number have been made to do VGA (pic and avr etc,
    simply, and I have found some ideas to convert SD VGA to DVI, which is
    compatible with HDMI which should be able to be done through a converter plug),
    there is a HDMI shield/hat for one or two to support software configured HDMI
    output. Unfortunately, no wifi enabled mcu board of that chip is available at that
    size. The RiscV version might be less useful, and only has been just released. So
    close! At this level in the ranges, it's incredibly easy to completely miss out, with no
    adequate workaround possible. I'm still trying to ascertain if that RiscV model
    has hardware for graphics at all, or of another model which might appear in a board
    people can buy.

    They have some sort of product manufacturing service scheme. Amazon has
    another one that has partners for that. But, that is going towards the future. A lot of
    engineering consumer products is for certifications, safety and manufacture. The
    business is building an organisation, administration, sales, distribution chain,
    marketing, insurance etc. Even if you just license, that's a lot of ongoing fees, and
    costs to negotiate and license. To design a product, have somebody else tidy up
    the design for manufacture and certifications then manufacture license and/or
    sell for the designer. You then are freed up to work on something else. I'm going
    have look into these things. Life is fast and what you can do gets shorter.

    https://www.seeedstudio.com/Seeed-XIAO-ESP32C3-p-5431.html

    There are also slightly larger boards from elsewhere, with little oled screens on them.

    Here is that 13.1x9.5mm inside USB connector fpga card with the ice40 you like
    Jan:


    https://github.com/im-tomu/fomu-hardware/tree/master/archive/pvt https://github.com/im-tomu/fomu-hardware#readme

    https://tomu.im/fomu.html


    This one has a chip with mcu and fpga:

    https://tomu.im/qomu.html

    Here is a different one without fpga but with wifi:

    https://tomu.im/womu.html

    The original model:

    https://tomu.im/tomu.html

    https://tomu.im/
    https://www.crowdsupply.com/sutajio-kosagi/tomu

    https://www.crowdsupply.com/img/3eef/tomu-size-scale_jpg_md-xl.jpg


    Here is tiny circuits. People have got VGA out of chips in the size range, but haven't
    looked these up. However the VGA ones were similar size.

    https://tinycircuits.com/collections/tinylily-platform/products/tinylily-mini-processor


    Here are some other small ones:


    https://www.kickstarter.com/projects/melbel/pico-the-worlds-smallest-arduino-board/description

    Yep this one is actually a different product with the same name from somebody
    else:

    https://mellbell.cc/products/pico

    0.6 inch square

    https://www.cnx-software.com/2020/01/20/piskey-atto-tiny-arduino-board-castellated-holes/

    20.32 x 12.7mm

    Another company with a smaller one of the same name:

    https://time4ee.com/news.php?readmore=468

    11.5 X 10.3mm. Getting closer.

    32 bit: https://www.electronics-lab.com/nerdonic-atom-x1-worlds-smallest-32-bit-arduino-compatible-board/

    14.9 x 14.9 x 4.4mm

    Wifi module iot:

    https://www.electronics-lab.com/blkbox-bb-e01p-worlds-smallest-esp8285-based-wifi-module/

    10×14 mm

    Here's a ATiny85 chip:

    https://forum.arduino.cc/t/the-smallest-micro-processor/893371/2

    https://makersportal.com/shop/attiny85-microcontroller
    How do I make a custom board for that :). It's getting close to the minium usable
    pins for the minimum feature configuration. I don't know of this one is suitable, but I'm
    looking around at something lile this. There is a 3c micro video here I haven't looked at.

    https://www.olimex.com/Products/Duino/AVR/OLIMEXINO-85S/open-source-hardware

    (16.9x12.7)mm

    Interesting to look at things like this and wifi modules. To find one that has spare
    capacity to accept and process a signal then output it as HDMI over Ethernet, and
    use a HDMI to ethernet adaptor cable.

    https://www.olimex.com/Products/Modules/Ethernet/ENC28J60-H/

    30x24 mm



    Now, I was looking at anti-fuse fpga many years back due to lower power and higher
    performance. But the technology was taken away from the market. 5Ghz
    technology. However, it looks like it's out there, but 400mhz I notice (have been pretty sick
    and haven't read into it all yet). I'm pretty interested in technology and services that
    allow a gate array structure to be set with performance and low energy closer to an
    custom ASIC chip, and cheap. I see there is a form of on chip storage used on some
    MCU's (I forget the name of it) which might be useful for an gatearray. They change
    the resistance of the material to block or allow circuit paths. I actually had an
    alternative idea for something to archieve this, and just realised an even
    simpler alternative. There seems to be a few things out there to archieve such an
    effect. I also found I have a link to magnetic fpga, which I forgot.

    https://www.quicklogic.com/products/fpga/fpgas-antifuse/

    https://www.quicklogic.com/products/efpga/antifuse-efpga/

    And here they have a CPU with fpga used in one of the products I looked at:

    https://www.quicklogic.com/products/soc/eos-s3-microcontroller/

    However, the energy consumption is not as low as I like, but this is probably not
    an anti-fuse product. GA was a good opportunity to produce processors to go on the
    different types of fpga product here. You start with a single node with conventional
    memory bus, and offer stay versions with that bus. The fpga manufacturer gets a tiny
    high speed low energy cheap processor that makes many softcores pointless. Combine
    that with a fine-grain fpga structure (you only use as much energy as what portion
    of the circuit you are using, which can by a lot less with the GA). The designer can
    use the single core or array as much as they like, and the dogs as little. The GA portion
    can outcompete the FPGA portion on energy to acertain degree. Now, what you get is
    parts mostly fpga of conventional size, with one or more node GA array. Fpga,
    that are smaller but with one or more GA nodes in an array. Ones which are largely GA
    and ones which are only GA, due to its ability to outcompete in some areas,
    even emulating an RiscV or Arm. But memory servicing is the key. At least one node, if
    not at least one on a side, have to be able to fully address and execute out of
    memory, without delay. That maximizes certain tasks and emulation, and allows the
    array's use to be more. It's a simple adjustment to the present scheme. A little node
    network handling adjustment would all add significant function. But seriously, I think
    that chip was a max of 4.5 watts or something before burn out. I forget. There was
    one chip that had many power aspects, but left the typical maximum power
    consumption blank. I wasn't so well, so it was a huge headache to realise it just was
    going be a big number compared to a GA node which of with full external bus could
    deliver more performance cheaper with lower energy. But, hey, maybe I'm wrong.

    So, anyway. Things haven't been going so well, and everything has stalled out on
    the projects. I'm being played with, and things threatened to stretch out, requiring actions I
    don't like which should be unnecessary instead. At the same time post covid
    symptoms big time, accidentally getting cyanide poisoning (turns out one of
    the things allows this to happen) accidentally poisoning with Lugol's, some
    strange non covid flu, my old cancer coming up at the same time and not able to
    action things, too much to do, too many other things going wrong (not mentioned here),
    all at the same time. Now I'm regaining some fortitude (that post covid symptoms was a
    lot), I've got to get back to catching up.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Wayne morellini@21:1/5 to gnuarm.del...@gmail.com on Wed Aug 10 06:15:13 2022
    On Sunday, July 17, 2022 at 2:37:23 PM UTC+10, gnuarm.del...@gmail.com wrote:
    Ok, if no power budget, what's your price target for the device? How about the FPGA? Have you estimated the size of the design so that you have an idea of the chip size you need? Do you have a development budget?


    Here is something you maybe interested in. Some sort of to market manufacturing
    capability:

    https://www.seeedstudio.com/edge-ai-partner-program

    https://www.seeedstudio.com/blog/2021/10/21/invigorate-your-inspiration-for-iot-with-lora-e5-and-free-seeed-fusion-pcba-prototypes/


    Here is a video where he uses a service to order custom boards using a parts list:

    https://youtu.be/4fvFLSeDc4M

    He is using Padauk 3 cent microcontrollers with context switching to do software IO,
    which is very much like my forth microcontroller design proposals around 30 years
    ago.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Wayne morellini@21:1/5 to Wayne morellini on Wed Aug 10 05:41:34 2022
    On Wednesday, August 3, 2022 at 6:30:30 AM UTC+10, Wayne morellini wrote:
    On Saturday, July 30, 2022 at 8:52:57 PM UTC+10, Jan Coombs wrote:
    On Sun, 17 Jul 2022 06:23:51 -0700 (PDT)
    Wayne morellini <waynemo...@gmail.com> wrote:

    On full buffers, we might
    speak of VGA, or SD, 8-16 bit
    output. 8 bit is probably
    going be enough, but even 24
    bit has use. So, 256KB-
    512KB, 768, 320-960 or more
    SD pal. Even a number of
    megabytes.
    Lattice iCE40 UltraPlus Family [5k/3k LUT4+FF].
    Open source tools (for design security).

    "In addition to the EBR, the iCE40 UltraPlus devices also feature four
    256 kb SPRAM blocks that can be cascaded to create up to 1 Mb block.
    It is useful for temporary storage of large quantities of information."

    EBR 4kb 256x16 etc, Embedded Block RAM
    SPRAM 16kb x 16 etc, Single Port RAM

    https://www.latticesemi.com/view_document?document_id=51968

    Jan Coombs
    Thanks Jan. That's the sort of things I'm thinking. You should google spram and see
    the different storage memory definitions it gives.

    I've been continuing to explore things in time background and have made a lot of progress, bit nowhere near the low energy levels I'm looking at. Of course, I'm
    looking for lowest energy levels, for a few different purposes.

    However, a number of things I've said in the past here, some smarties try to drown
    out, it turns out smarter minds are also actively pursuing. Such as multiple chip packages in 2D or 3D using "chiplets". Intel foundry services is using. I'm
    currently struggling to keep awake watching a video on it, with yet another crazed
    sounding narrator grind away on my nerves. So, my ambition to stack a now "chiplet" sram like die in a multichip package with high speed die to die signaling
    (yes, the video sounds familiar) to a processor core, looks like becoming a reality
    (please note, you don't need a fan to mix and put chiplets into a multiple chip package).
    So good when reality proves the usual negative for the sake of mouthing off, suspects wrong.

    https://youtu.be/z89ysU4RwIg

    My thought, is that a chip like the ga144 could use such a cheap memory psram chiplet
    in package. But, I don't know how many cycles the chip takes up to perform one
    instruction cycle. I presumed a number, but realised last night, you could just sacrifice
    a few cores to synchronise a stream of memory fetches to another core. Maybe not 700mhz, but then not many
    cost effective simple external memories will go near that fast.

    I've decided as the project is likely to get 10,000 or so sales at max but needs to be below
    $40 to get those sales, I could land up doing $100k of work for $10k, so am looking
    at making it a community project using a small cheap development board. Also, due
    to possible hassles with HDMI requiring a $10k license per product, and no board
    small enough, coming with a HDMI licensed function and port, I've decided to scrap
    that and explore a lower latency version of Miracast or one of the USB video standards where the user buys a USB to HDMI adaptor. But also looking at a custom
    wireless or wired transmission. I could literally do HDMI over cat or optical
    instead, and basically support an embedded cable with HDMI end on it.

    Here is a Arduino wifi RiscV development board I'm checking out. It's around 21
    mm by 17mm. There are slightly smaller, but they are a lot slower, lack features, and
    wifi, avr or pic. But, there is a very small fpga board under development. There are a few
    such fpga boards. If only the chip in the seed Xia one below supported graphics and
    HDMI, it would be great. Unfortunately, it seems all the
    chips at this level lack something that could easily have been supported. At the
    moment, I'm trying to find out if the chip even has support for Miracast. I forecast a long
    time ago, that there would be such chips that would have enough resources to be used
    for more general purposes. A number have been made to do VGA (pic and avr etc,
    simply, and I have found some ideas to convert SD VGA to DVI, which is compatible with HDMI which should be able to be done through a converter plug),
    there is a HDMI shield/hat for one or two to support software configured HDMI
    output. Unfortunately, no wifi enabled mcu board of that chip is available at that
    size. The RiscV version might be less useful, and only has been just released. So
    close! At this level in the ranges, it's incredibly easy to completely miss out, with no
    adequate workaround possible. I'm still trying to ascertain if that RiscV model
    has hardware for graphics at all, or of another model which might appear in a board
    people can buy.

    They have some sort of product manufacturing service scheme. Amazon has another one that has partners for that. But, that is going towards the future. A lot of
    engineering consumer products is for certifications, safety and manufacture. The
    business is building an organisation, administration, sales, distribution chain,
    marketing, insurance etc. Even if you just license, that's a lot of ongoing fees, and
    costs to negotiate and license. To design a product, have somebody else tidy up
    the design for manufacture and certifications then manufacture license and/or
    sell for the designer. You then are freed up to work on something else. I'm going
    have look into these things. Life is fast and what you can do gets shorter.

    https://www.seeedstudio.com/Seeed-XIAO-ESP32C3-p-5431.html

    There are also slightly larger boards from elsewhere, with little oled screens on them.

    Here is that 13.1x9.5mm inside USB connector fpga card with the ice40 you like
    Jan:


    https://github.com/im-tomu/fomu-hardware/tree/master/archive/pvt https://github.com/im-tomu/fomu-hardware#readme

    https://tomu.im/fomu.html


    This one has a chip with mcu and fpga:

    https://tomu.im/qomu.html

    Here is a different one without fpga but with wifi:

    https://tomu.im/womu.html

    The original model:

    https://tomu.im/tomu.html

    https://tomu.im/
    https://www.crowdsupply.com/sutajio-kosagi/tomu

    https://www.crowdsupply.com/img/3eef/tomu-size-scale_jpg_md-xl.jpg


    Here is tiny circuits. People have got VGA out of chips in the size range, but haven't
    looked these up. However the VGA ones were similar size.

    https://tinycircuits.com/collections/tinylily-platform/products/tinylily-mini-processor


    Here are some other small ones:


    https://www.kickstarter.com/projects/melbel/pico-the-worlds-smallest-arduino-board/description

    Yep this one is actually a different product with the same name from somebody
    else:

    https://mellbell.cc/products/pico

    0.6 inch square

    https://www.cnx-software.com/2020/01/20/piskey-atto-tiny-arduino-board-castellated-holes/

    20.32 x 12.7mm

    Another company with a smaller one of the same name:

    https://time4ee.com/news.php?readmore=468

    11.5 X 10.3mm. Getting closer.

    32 bit: https://www.electronics-lab.com/nerdonic-atom-x1-worlds-smallest-32-bit-arduino-compatible-board/

    14.9 x 14.9 x 4.4mm

    Wifi module iot:

    https://www.electronics-lab.com/blkbox-bb-e01p-worlds-smallest-esp8285-based-wifi-module/

    10×14 mm

    Here's a ATiny85 chip:

    https://forum.arduino.cc/t/the-smallest-micro-processor/893371/2

    https://makersportal.com/shop/attiny85-microcontroller
    How do I make a custom board for that :). It's getting close to the minium usable
    pins for the minimum feature configuration. I don't know of this one is suitable, but I'm
    looking around at something lile this. There is a 3c micro video here I haven't looked at.

    https://www.olimex.com/Products/Duino/AVR/OLIMEXINO-85S/open-source-hardware

    (16.9x12.7)mm

    Interesting to look at things like this and wifi modules. To find one that has spare
    capacity to accept and process a signal then output it as HDMI over Ethernet, and
    use a HDMI to ethernet adaptor cable.

    https://www.olimex.com/Products/Modules/Ethernet/ENC28J60-H/

    30x24 mm



    Now, I was looking at anti-fuse fpga many years back due to lower power and higher
    performance. But the technology was taken away from the market. 5Ghz technology. However, it looks like it's out there, but 400mhz I notice (have been pretty sick
    and haven't read into it all yet). I'm pretty interested in technology and services that
    allow a gate array structure to be set with performance and low energy closer to an
    custom ASIC chip, and cheap. I see there is a form of on chip storage used on some
    MCU's (I forget the name of it) which might be useful for an gatearray. They change
    the resistance of the material to block or allow circuit paths. I actually had an
    alternative idea for something to archieve this, and just realised an even simpler alternative. There seems to be a few things out there to archieve such an
    effect. I also found I have a link to magnetic fpga, which I forgot.

    https://www.quicklogic.com/products/fpga/fpgas-antifuse/

    https://www.quicklogic.com/products/efpga/antifuse-efpga/

    And here they have a CPU with fpga used in one of the products I looked at:

    https://www.quicklogic.com/products/soc/eos-s3-microcontroller/

    However, the energy consumption is not as low as I like, but this is probably not
    an anti-fuse product. GA was a good opportunity to produce processors to go on the
    different types of fpga product here. You start with a single node with conventional
    memory bus, and offer stay versions with that bus. The fpga manufacturer gets a tiny
    high speed low energy cheap processor that makes many softcores pointless. Combine
    that with a fine-grain fpga structure (you only use as much energy as what portion
    of the circuit you are using, which can by a lot less with the GA). The designer can
    use the single core or array as much as they like, and the dogs as little. The GA portion
    can outcompete the FPGA portion on energy to acertain degree. Now, what you get is
    parts mostly fpga of conventional size, with one or more node GA array. Fpga,
    that are smaller but with one or more GA nodes in an array. Ones which are largely GA
    and ones which are only GA, due to its ability to outcompete in some areas, even emulating an RiscV or Arm. But memory servicing is the key. At least one node, if
    not at least one on a side, have to be able to fully address and execute out of
    memory, without delay. That maximizes certain tasks and emulation, and allows the
    array's use to be more. It's a simple adjustment to the present scheme. A little node
    network handling adjustment would all add significant function. But seriously, I think
    that chip was a max of 4.5 watts or something before burn out. I forget. There was
    one chip that had many power aspects, but left the typical maximum power consumption blank. I wasn't so well, so it was a huge headache to realise it just was
    going be a big number compared to a GA node which of with full external bus could
    deliver more performance cheaper with lower energy. But, hey, maybe I'm wrong.

    So, anyway. Things haven't been going so well, and everything has stalled out on
    the projects. I'm being played with, and things threatened to stretch out, requiring actions I
    don't like which should be unnecessary instead. At the same time post covid symptoms big time, accidentally getting cyanide poisoning (turns out one of the things allows this to happen) accidentally poisoning with Lugol's, some strange non covid flu, my old cancer coming up at the same time and not able to
    action things, too much to do, too many other things going wrong (not mentioned here),
    all at the same time. Now I'm regaining some fortitude (that post covid symptoms was a
    lot), I've got to get back to catching up.


    So, apart from all the complications and marginality caused by health related
    incidents mentioned elsewhere. A hunt for parts of the right specs to handle
    the performance requirements, is still ongoing and on hold. I've ordered a
    series of boards from overseas, we'll see if I can get to use those. So, a miniature
    board with the RP2040, one with the RiscV esp32c3 processor. I can get boards
    for tiny avr etc locally, but frankly all these boards lack in key performance areas.

    I am also getting an Tang Nano 9k FPGA, because it's compact with hdmi.

    All the mcu's seem to lack enough performance, requiring additional circuitry. Which means that I'm not really much better off than using GA with an external memory, if I could run it fast enough. If the 4 core GA had a processor (or 4) with
    full execution bus with large memory on die, that would be great. Actually, 4 cores
    around a sea of memory, sounds like a product. Surround the chip with cures with
    dma features, is sort of like the chip design proposal I am looking at.

    I was hoping to limit external components, but to sample the video at 5 million
    samples a second is going require at least a circuit to extract the streams (luminance colour and sound as well) and covert to reliable levels and phases and
    then to a bit stream to be streamed to display. I don't actually need more than
    monochrome luminance to do something, but because a basic feature is to shift levels or pass through the video stream, it's more complicated. But just to pickup
    monochrome is a trigger level adjustment to register a bit on a port.

    I see a commercial overlap with some other projects. So even though this is not
    commercial at this stage (due to lack of market compared to before the pandemic)
    it's not a complete waste of time. The sticking point is, sampling is not fast enough.

    I need 1-4+ bit precision. I'm thinking of a simple analogue structure to trigger a bit
    for each full reduction in energy through the circuit. If I could theoretically find a
    capacitor which could reliably charge and discharge fast enough, the accuracy still
    wouldn't be good enough likely, as your sample point is taking in the accumulation of
    energy volume rather than the peak. I'm interested in triggering a registration of peak.
    In registering the sound, I'm more interested in shape and overall volume beneath
    the wave. There is some woeful sounding sound out there, which could be processed
    to enhanced sound that way.

    Anyway, here is one of those riscv c3 boards with the miniature LCD's on the back. .

    https://m.aliexpress.com/item/1005004502409118.html

    https://ae01.alicdn.com/kf/Sa2cad6d0b9534b9498bfe0d67e7bb553T.jpg_640x640Q90.jpg_.webp

    Pretty interesting retro green monitor text look on a longer board:

    https://m.aliexpress.com/item/1005003648478457.html

    https://ae01.alicdn.com/kf/S363ea8d12b714de69ed91c1ce2154ea44.jpg_640x640Q90.jpg_.webp

    My idea of a microcontroller board size:

    https://youtu.be/yMzRi4AAvV4

    I am commercially interested in something going down to the size of a micro-sd memory card or smaller.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Rick C@21:1/5 to Wayne morellini on Wed Aug 10 20:30:49 2022
    On Wednesday, August 10, 2022 at 9:15:15 AM UTC-4, Wayne morellini wrote:
    On Sunday, July 17, 2022 at 2:37:23 PM UTC+10, gnuarm.del...@gmail.com wrote:
    Ok, if no power budget, what's your price target for the device? How about the FPGA? Have you estimated the size of the design so that you have an idea of the chip size you need? Do you have a development budget?
    Here is something you maybe interested in. Some sort of to market manufacturing
    capability:

    https://www.seeedstudio.com/edge-ai-partner-program

    https://www.seeedstudio.com/blog/2021/10/21/invigorate-your-inspiration-for-iot-with-lora-e5-and-free-seeed-fusion-pcba-prototypes/


    Here is a video where he uses a service to order custom boards using a parts list:

    https://youtu.be/4fvFLSeDc4M

    He is using Padauk 3 cent microcontrollers with context switching to do software IO,
    which is very much like my forth microcontroller design proposals around 30 years
    ago.

    Thanks.

    I'm familiar with Dave Jones, EEVblog and Padauk MCUs.

    --

    Rick C.

    -+ Get 1,000 miles of free Supercharging
    -+ Tesla referral code - https://ts.la/richard11209

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Wayne morellini@21:1/5 to Wayne morellini on Sat Sep 3 23:32:52 2022
    On Sunday, July 17, 2022 at 2:19:21 AM UTC+10, Wayne morellini wrote:
    I've got a side application requiring conversion of video signals,
    and a second requiring buffering.

    Anybody know of parts that may do this?

    An low count FPGA might, but are not likely to run off the power
    from the video, scart or RGB port.

    Thanks.

    Syncing video filter project threads.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Wayne morellini@21:1/5 to Wayne morellini on Sun Sep 4 08:35:19 2022
    On Sunday, September 4, 2022 at 4:32:54 PM UTC+10, Wayne morellini wrote:
    On Sunday, July 17, 2022 at 2:19:21 AM UTC+10, Wayne morellini wrote:
    I've got a side application requiring conversion of video signals,
    and a second requiring buffering.

    Anybody know of parts that may do this?

    An low count FPGA might, but are not likely to run off the power
    from the video, scart or RGB port.

    Thanks.
    Syncing video filter project threads.


    Video filter project

    Question: The smallest cheapest part to act as a pallet/buffer for video signal?

    https://groups.google.com/u/2/g/comp.lang.forth/c/S-_qe2Kh6gk

    Misc chips. Rate you can address and execute off an external Srams?

    https://groups.google.com/u/2/g/comp.lang.forth/c/wJxxskU6wjg

    Locating cheap Flash+RAM module.

    https://groups.google.com/u/2/g/comp.lang.forth/c/L7f6Ljqpswc

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)