• Is there an open source software or Python package can simulate Verilog

    From Xiabing Lou@21:1/5 to All on Thu May 30 11:46:06 2019
    I am new to Verilog A. I am wondering if there is any open source software that can run a Verilog A device model.

    I wish to use a Python package like pyverilog. But it seems that pyverilog does not support Verilog A, am I right? Thanks a lot.


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