I don't recall having much difficulty when using the Aldec Active-HDL simulator before. This time I'm having trouble figuring out the controls.loses track of the top of Top-Level module so it has to be reset to run again. The help file isn't much good at searching for info on this.
I can't find a control to stop the simulation if it is into a long run and early on I see a something I want to investigate. The only controls that seem to stop the simulation kill the waveform data. What's worse is the "End simulation" control also
I've tried to figure out how to get the tool to save all the signals data so I don't have to rerun the simulation every time I think of a new signal I want to see. Again, the manual isn't much help because it points me to a setting to allow allsignals to be saved, but that control is grayed out and I can't find anything explaining why. Even a Google search doesn't find anything.
What is just as bad or worse is that the durn tools make copies of your source files rather than working with the ones you create and presumably edit. So for now I'm copying the files over to the project directory with each edit.
I seem to recall being fairly effective using this tool in the past. Has the tool changed that much or have I?
On 09/09/2020 04:59, Rick C wrote:also loses track of the top of Top-Level module so it has to be reset to run again. The help file isn't much good at searching for info on this.
I don't recall having much difficulty when using the Aldec Active-HDL simulator before. This time I'm having trouble figuring out the controls.
I can't find a control to stop the simulation if it is into a long run and early on I see a something I want to investigate. The only controls that seem to stop the simulation kill the waveform data. What's worse is the "End simulation" control
signals to be saved, but that control is grayed out and I can't find anything explaining why. Even a Google search doesn't find anything.I've tried to figure out how to get the tool to save all the signals data so I don't have to rerun the simulation every time I think of a new signal I want to see. Again, the manual isn't much help because it points me to a setting to allow all
What is just as bad or worse is that the durn tools make copies of your source files rather than working with the ones you create and presumably edit. So for now I'm copying the files over to the project directory with each edit.
I seem to recall being fairly effective using this tool in the past. Has the tool changed that much or have I?
Are you using a paid for version of the free one from Lattice ?
I'm away from home and office this week (on hols) but I'll take a look
when I get back.
I usually design in Aldec and the FPGA tools are pointed at the source
files it generates - so I don't get you copy problem.
I think I usually run the simulation from start again if I add signals.
I pay them a fortune for maintenance and support so I can ask the
questions !
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