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Scaling Datacenter Accelerators With Compute-Reuse Architectures

"We discussed the implications of the end of transistor scaling in accelerators, while presenting still-scaling storage as means
to make future improvement in computation capabilities possible.
We integrated contemporary emerging memory technologies to construct
COREx in order to compensate for non-scaling CMOS technology by
transforming transistorbased computations to table storage which
continues to scale."

Read more here:

http://parallel.princeton.edu/papers/corex-isca18.pdf


Thank you,
Amine Moulay Ramdane.

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