• C compiler pointer management on DSPs

    From gah4@u.washington.edu@21:1/5 to David Brown on Thu Feb 27 14:23:05 2020
    On Monday, September 30, 2019 at 3:06:36 PM UTC-7, David Brown wrote:

    (snip)

    Some processors have larger access sizes to simplify the hardware. The
    first DEC Alpha, and some ARM designs, had no instructions for reading
    or writing 8-bit or 16-bit data. In effect, these had 32-bit (maybe on
    the Alpha it was 64-bit) "byte" sizes. But smaller access sizes could
    be easily simulated in software.

    Alpha isn't quite that bad.

    The load/store instructions work on 32 or 64 bit units, but they ignore
    the low bits when doing it.

    So, you take a byte address, and use a load instruction to load its
    word into a register. (I forget now the names of the memory units.)

    Then there are instructions for operating on bytes
    in a register which ignore the high bits. So, you can load a byte
    from memory into a register with two instructions. To store a byte,
    I believe you load the word, replace the byte, and write it back,
    so three instructions.

    Note that those operations are what CISC processors do without
    you thinking about them on many machines, as memory is often
    much wider than 8 bits.

    Machines not so well designed require masking off the appropriate
    bits before operating with them, though many machines ignore high
    bits on shift operations. (The 8086 allows shifts up to 255 bits.)

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  • From robin51@dodo.com.au@21:1/5 to gah4@u.washington.edu on Fri Feb 28 10:26:48 2020
    On 2020-02-28 09:23, gah4@u.washington.edu wrote:

    Machines not so well designed require masking off the appropriate
    bits before operating with them, though many machines ignore high
    bits on shift operations. (The 8086 allows shifts up to 255 bits.)

    Who can say that the CDC machines (7600; 70 series, etc) were not
    well designed?

    They were intended to be fast, and to carry out operations on
    words (of 60 bits).

    To be sure, it was necessary to mask bits (usually characters),
    but there was a simple instruction(s) to generate a mask of
    n bits (better than loading a word containing bits to be used
    as a mask).

    On the other hand, the IBM S/360 was designed from the beginning to
    handle bytes of 8 bits, half-words of 16 bits, and words of 32 bits.

    Instructions could load and store a byte into/from the low-order
    bits of a register, without affecting the other bits. Later models
    could load/store one or more bytes into/from a register without
    affecting the other bits.

    For more general work, masking operations were available in the
    32-bit registers.

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  • From gah4@u.washington.edu@21:1/5 to rob...@dodo.com.au on Fri Feb 28 02:33:56 2020
    On Thursday, February 27, 2020 at 7:03:27 PM UTC-8, rob...@dodo.com.au wrote:
    On 2020-02-28 09:23, gah4@u.washington.edu wrote:

    Machines not so well designed require masking off the appropriate
    bits before operating with them.

    (snip)

    Who can say that the CDC machines (7600; 70 series, etc) were not
    well designed?

    They were intended to be fast, and to carry out operations on
    words (of 60 bits).

    CDC machines are designed for fast floating point number crunching.

    They are not necessarily designed for fast character manipulation,
    as that is supposed to be a relatively small part of the work.

    The hardware/software tradeoffs were different so many years ago.

    My favorite one has always been how the IBM 704 (and I believe
    later 36 bit machines) read in cards. The read row-wise, each row
    into two 36 bit words, leaving off 8 columns. This is also the reason
    why Fortran (fixed form) uses columns 1-72.

    Anyway, after the compiler reads in a card row-wise, it has to
    convert to columnwise (six characters per word), including converting
    to the appropriate character code. But it presumably saves a lot of
    logic in the card reader, where it would be expensive and could be
    done in software. The 7094 was the high-end number cruncher at
    the time, including its use for S/360 emulation during its development.

    But actually, as well as I know, the more usual way to run such
    machines was to copy cards to tape, presumably in a cheaper machine,
    so that the fast machine didn't waste so much time.

    I don't know about the 60 bit machines, but there are stories
    about C compilers for Cray machines using 64 bit char.

    As with the CDC machines, Cray machines are designed for fast floating
    point, and not so fast for fixed point.
    [This is getting rather far from compilers but would be totally on-topic
    in alt.folklore.computers. -John]

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