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Re: why assignment to a single bit of a reg report a error?

By Hill Stone on Sun Dec 26 15:07:19 2021

Latest reply by Hill Stone on Sun Dec 26 15:11:27 2021
cadence digital design flow

By Lemi Agrey on Wed Nov 24 15:44:51 2021

Latest reply by Lemi Agrey on Wed Nov 24 15:44:51 2021
Verilog error

By Lemi Agrey on Tue Oct 12 22:45:28 2021

Latest reply by Lemi Agrey on Tue Oct 12 22:45:28 2021
No PDK installation information

By ejm20Rick on Fri Aug 3 11:31:25 2018

Latest reply by ejm20Rick on Wed Aug 25 13:48:01 2021
Layer control of Calibre LVL with GDSII output format

By Kalyan Sikder on Tue Aug 17 13:06:28 2021

Latest reply by Kalyan Sikder on Tue Aug 17 13:06:28 2021
Reload monte carlo results in ADE XL

By Murali on Thu Nov 17 03:22:08 2016

Latest reply by =?UTF-8?B?6JGJ5a6455Ge?= on Sun Aug 15 03:30:06 2021
combobox dependent on another combobox skill virtuoso

By &aurabh &rivastava on Mon Jun 7 04:57:21 2021

Latest reply by &aurabh &rivastava on Mon Jun 7 04:57:21 2021
Running LVS from command line?

By Aisha Meena on Mon Jun 7 03:22:17 2021

Latest reply by Aisha Meena on Mon Jun 7 03:23:41 2021
Can you hack SKILL? Are you on Upwork?

By Ananth Chellappa on Sun May 30 12:15:59 2021

Latest reply by Ananth Chellappa on Sun May 30 12:15:59 2021
M52: Terminals are not distinct.

By ABDELKHALAK HARRAK on Mon May 24 09:26:49 2021

Latest reply by ABDELKHALAK HARRAK on Mon May 24 09:26:49 2021
Error while opening Layout View using Layout XL in IC614

By pbhattacharjee348@gmail.com on Tue Jan 31 03:28:17 2017

Latest reply by Vishesh Gupta on Sun May 9 11:00:57 2021
Cadence Design Framework II & ES2

By Djamel DELLAA on Wed Mar 24 07:31:58 2021

Latest reply by Djamel DELLAA on Wed Mar 24 07:31:58 2021
Valid SCALDStation help

By J Touzet on Tue Mar 23 18:15:15 2021

Latest reply by J Touzet on Tue Mar 23 18:15:15 2021
How to use BSIM-cmg or other BSIM model in simulation

By Bramha Pandey on Sun Jan 3 16:57:50 2021

Latest reply by Bramha Pandey on Sun Jan 3 16:57:50 2021
Monitor license usage

By Mike Nicholson on Thu Nov 19 13:55:42 2020

Latest reply by Mike Nicholson on Thu Nov 19 13:55:42 2020
PVS and Calibre DRC rule file

By JWM on Thu Nov 19 11:34:21 2020

Latest reply by JWM on Thu Nov 19 11:34:21 2020
Spectre: ALTERing arrayed instances (ADE version: IC6.1.5.500.16.2,

By Jacob Rohan on Tue Nov 17 16:30:41 2020

Latest reply by Jacob Rohan on Tue Nov 17 16:30:41 2020
Simulating phase noise for PFD-CP

By game7world on Wed Nov 11 11:23:02 2020

Latest reply by game7world on Wed Nov 11 11:23:02 2020
ADE simulation problems

By Muhammed Ali Dagdibi on Mon Nov 9 06:23:48 2020

Latest reply by Muhammed Ali Dagdibi on Mon Nov 9 06:23:48 2020
Code error

By jalal makky on Thu Oct 15 05:12:30 2020

Latest reply by jalal makky on Thu Oct 15 05:12:30 2020
Problem with CBD file of TSMC in Cadence

By Kr. Sheelvardhan Banty on Wed Oct 14 23:08:46 2020

Latest reply by Kr. Sheelvardhan Banty on Wed Oct 14 23:08:46 2020
ADE XL Sweep Issue

By kngor on Sun Sep 27 01:14:22 2020

Latest reply by nhuttandoan234@gmail.com on Sun Sep 27 14:33:48 2020
Simulation error

By nisha yadav on Fri Aug 21 06:26:15 2020

Latest reply by santosh kumar gangala on Sat Sep 5 05:32:13 2020
ADE XL Message 5052

By santosh kumar gangala on Sat Sep 5 05:24:41 2020

Latest reply by santosh kumar gangala on Sat Sep 5 05:24:41 2020
Need help with ADE interface to LSF for simulation job distribution

By Vivek N on Fri Aug 14 15:12:34 2020

Latest reply by Vivek N on Fri Aug 21 05:30:33 2020
error in cadence simulation

By Gurirnderpal Singh on Tue Aug 11 20:55:49 2020

Latest reply by Gurirnderpal Singh on Tue Aug 11 20:55:49 2020
to solve differential equations in verilog-a?

By Mike Meng on Sat Jun 6 17:56:42 2020

Latest reply by Mike Meng on Sat Jun 6 17:56:42 2020
dc operating parameters ron and rout.

By mgupta51@asu.edu on Wed May 13 17:07:45 2020

Latest reply by mgupta51@asu.edu on Wed May 13 17:07:45 2020
Help!!, Spectre error: Illegal library definition found in netlist for

By OZZ on Sun May 3 23:33:44 2020

Latest reply by OZZ on Sun May 3 23:33:44 2020
ORCAD Date Format

By catalineacsu@gmail.com on Wed Aug 3 04:57:07 2016

Latest reply by sfelhofer@gmail.com on Fri Apr 3 06:47:32 2020
Las Terrazas Belize

By jodi.bushkin@gmail.com on Wed Mar 4 16:01:40 2020

Latest reply by jodi.bushkin@gmail.com on Wed Mar 4 16:01:40 2020
SFDR(spurious free dynamic range) of a DAC

By nguyendinhthuc18@gmail.com on Sun Sep 4 21:05:42 2016

Latest reply by nupur.18mt0501@ece.iitism.ac.in on Wed Mar 4 09:16:59 2020
how to use "adc_dnl_8bit" for DNL simulation?

By asmurti1feb@gmail.com on Tue Mar 3 03:05:22 2020

Latest reply by asmurti1feb@gmail.com on Tue Mar 3 03:05:22 2020
verilog-layout synthesis

By egkvinay94@gmail.com on Wed Feb 26 15:02:37 2020

Latest reply by egkvinay94@gmail.com on Wed Feb 26 15:02:37 2020
Staggered pattern generation problem for the Virtuoso modgen

By Anna Kuzmina on Sun Feb 9 19:34:30 2020

Latest reply by Fikre Tsigabu Gebreyohannes on Wed Feb 26 06:28:26 2020
SKILL Script needed to replace library and cell name of all instances i

By del on Wed Sep 2 07:48:11 2015

Latest reply by troy.a.new@gmail.com on Fri Feb 7 09:43:19 2020
how to change set of metals orientation

By yallappag3@gmail.com on Thu Jan 23 00:57:50 2020

Latest reply by yallappag3@gmail.com on Thu Jan 23 00:57:50 2020
how to solve the error of "Unable to locate'spectre' executable in

By faustifederico@gmail.com on Fri Jan 17 16:58:26 2020

Latest reply by faustifederico@gmail.com on Fri Jan 17 16:58:26 2020
list of cell excluding specific from one category

By vincentcupper@gmail.com on Mon Oct 7 05:01:33 2019

Latest reply by vincentcupper@gmail.com on Mon Oct 7 05:01:33 2019
weird cdslmd problem

By mag on Sat Sep 21 12:35:34 2019

Latest reply by mag on Sat Sep 21 12:35:34 2019
Source Primary Cell Not Found In Source Database

By Amol Boke on Mon Sep 16 05:34:13 2019

Latest reply by Amol Boke on Mon Sep 16 05:34:13 2019
Transmission Line in Cadence

By sharmavijender003@gmail.com on Wed Jul 4 22:27:30 2018

Latest reply by jagadish77.ece@gmail.com on Tue Jul 16 05:00:11 2019
Triple-well Device GF 130 nm

By JM2000 on Mon Jul 15 15:45:54 2019

Latest reply by JM2000 on Mon Jul 15 15:45:54 2019
*WARNING* ddUpdateLibList: Did not find any 'cds.lib' file

By Colin Ross on Mon Mar 5 12:30:57 2018

Latest reply by devinatkin@gmail.com on Wed Jul 10 11:05:21 2019
SKILL: How to convert a waveform object into a list?

By ignamv@gmail.com on Wed Jul 3 09:15:29 2019

Latest reply by ignamv@gmail.com on Wed Jul 3 09:15:29 2019
The most efficient way to create pcells ?

By ashrafosman08@gmail.com on Fri Mar 10 11:50:01 2017

Latest reply by sidunaleksandr@gmail.com on Fri Jun 7 07:41:08 2019
How to use ideal functional block such as comparator in my case ?

By ASHISH JHA on Wed Jun 5 04:49:42 2019

Latest reply by ASHISH JHA on Wed Jun 5 04:49:42 2019
Skill, Microsoft Excel, and a .csv file?

By anujrana1616@gmail.com on Sat Jun 1 11:00:08 2019

Latest reply by anujrana1616@gmail.com on Sat Jun 1 11:00:08 2019
LVS. Probe av_extracted nets.

By JM2000 on Fri May 31 10:38:26 2019

Latest reply by Yuan Mo on Sat Jun 1 06:42:50 2019
Cell rppolywo is not defined

By sonu vishwakarma on Tue May 28 02:08:30 2019

Latest reply by sonu vishwakarma on Tue May 28 02:08:30 2019
I an facing prob with `include "constants.vams" `include "disciplines.v

By shubham.patil@iitgn.ac.in on Sun May 12 14:24:43 2019

Latest reply by shubham.patil@iitgn.ac.in on Sun May 12 14:24:43 2019
How to count instances in a hierarchy

By kirankumar29s22@gmail.com on Wed May 8 08:30:24 2019

Latest reply by kirankumar29s22@gmail.com on Wed May 8 08:30:24 2019
problem with veriloga model

By alexia.itzellg@gmail.com on Tue Apr 23 02:18:56 2019

Latest reply by alexia.itzellg@gmail.com on Tue Apr 23 02:18:56 2019
How do we "tap" a layer in Virtuoso Layout Editor that is BELOW the mos

By Andy in Training on Thu Apr 11 17:18:58 2019

Latest reply by Andy in Training on Thu Apr 11 17:18:58 2019
Is there a way to show multiple LSW windows in IC5141 Virtuoso?

By Andy in Training on Wed Apr 10 16:48:49 2019

Latest reply by Andy in Training on Wed Apr 10 16:48:49 2019
flatten, merge and digitise conductors

By fogh on Mon Apr 8 07:06:40 2019

Latest reply by fogh on Mon Apr 8 07:06:40 2019
How to rename/copy library with prefix/suffix added in all the cells

By kalyan.buet@gmail.com on Fri Mar 29 15:27:15 2019

Latest reply by kalyan.buet@gmail.com on Fri Mar 29 15:27:15 2019
CDL syntax error

By ejm20Rick on Wed Mar 27 15:04:14 2019

Latest reply by ejm20Rick on Wed Mar 27 15:04:14 2019
select LSW layer through skill

By deeksha14.acharya@gmail.com on Thu Mar 14 00:22:43 2019

Latest reply by deeksha14.acharya@gmail.com on Thu Mar 14 00:22:43 2019
Plotting transistor parameters against time

By ftm.mrbs@gmail.com on Fri Mar 8 11:50:30 2019

Latest reply by ftm.mrbs@gmail.com on Fri Mar 8 11:50:30 2019
easy way to copy pin and text display in Skill??

By deeksha14.acharya@gmail.com on Wed Feb 27 04:12:46 2019

Latest reply by deeksha14.acharya@gmail.com on Wed Feb 27 04:12:46 2019
!! DOWNLOAD THE MOST POPULAR 2005's CRACKED SOFTWARE !!

By murugananthampommaraj@gmail.com on Sun Nov 19 05:39:38 2017

Latest reply by akeong2019@gmail.com on Tue Feb 26 07:50:05 2019
GR268a: RX(in Bp) to RX (not BP) (in same NW) not over T2) space <= 38.

By jmercier1481@gmail.com on Sun Feb 10 15:04:04 2019

Latest reply by boriswart@gmail.com on Mon Feb 11 14:12:01 2019
net probe colors in schematic editor

By h.santhu@gmail.com on Wed Feb 6 09:50:17 2019

Latest reply by h.santhu@gmail.com on Wed Feb 6 09:50:17 2019
Code for selecting Cellnames and Instance Terms.

By deeksha14.acharya@gmail.com on Thu Jan 31 01:58:38 2019

Latest reply by deeksha14.acharya@gmail.com on Thu Jan 31 01:58:38 2019
QRC Assura Extraction failing !

By Parulekar on Sat Jan 5 19:14:08 2019

Latest reply by Parulekar on Sat Jan 5 19:14:08 2019
Area unit in Synopsys?

By avais.suhail@gmail.com on Mon Dec 17 19:59:34 2018

Latest reply by avais.suhail@gmail.com on Tue Dec 18 03:19:13 2018
Cadence Virtuoso IC 615 error

By adityatumsare0692@gmail.com on Wed Nov 21 01:22:54 2018

Latest reply by adityatumsare0692@gmail.com on Wed Nov 21 01:22:54 2018
PSUB MULT ERROR & NWELL STAMP ERROR MULT

By ajishekaerotek@gmail.com on Tue Aug 8 06:03:39 2017

Latest reply by aejtahed10@gmail.com on Sat Nov 10 23:29:53 2018
Placing markers in Smith Chart

By goutham.murugesan@gmail.com on Wed Aug 8 11:41:26 2018

Latest reply by goutham.murugesan@gmail.com on Wed Aug 8 11:41:26 2018
Extracting a net with Mentor Calibre ?

By ashish.chaurasia@sankalpsemi.com on Tue Mar 6 03:21:22 2018

Latest reply by arpita.kar1205@gmail.com on Tue Jul 31 04:39:36 2018
How to create a dummy fill gds file using assura

By kunalbhatt4393@gmail.com on Fri Jul 6 10:28:02 2018

Latest reply by kunalbhatt4393@gmail.com on Fri Jul 6 10:28:02 2018
plotter capabities file

By ejm20Rick on Thu Jun 28 07:57:33 2018

Latest reply by ejm20Rick on Thu Jun 28 07:57:33 2018
Coplanar waveguide modeling in Cadence Virtuoso

By Piash Das on Wed Jun 20 02:49:02 2018

Latest reply by Piash Das on Wed Jun 20 02:49:02 2018
Inductor with Skill Langage

By vijayvinay93@gmail.com on Tue Aug 22 03:35:21 2017

Latest reply by jagadish77.ece@gmail.com on Thu May 24 01:08:20 2018
Unlock M1 mask1Color to Mask2Color

By yallappagodachi@gmail.com on Thu Apr 12 23:16:08 2018

Latest reply by yallappagodachi@gmail.com on Thu Apr 12 23:16:08 2018
monte_carlo error

By pawanparihar1234@gmail.com on Tue Apr 10 22:34:57 2018

Latest reply by pawanparihar1234@gmail.com on Tue Apr 10 22:34:57 2018
how will write skill code for dummies p cell ?

By pothumarthinagaiah@gmail.com on Thu Apr 5 20:51:39 2018

Latest reply by pothumarthinagaiah@gmail.com on Thu Apr 5 20:51:39 2018
The instance `M1' is referencing an undefined model or subcircuit, `nmo

By Jyoti Chhichhollia on Sun Feb 25 05:50:03 2018

Latest reply by Rubel Sarkar on Wed Mar 21 06:52:46 2018
GDS to schematic

By Rubel Sarkar on Wed Mar 21 06:49:33 2018

Latest reply by Rubel Sarkar on Wed Mar 21 06:49:33 2018
Montecarlo Mismatch Parameter list

By parisa.taheri70@gmail.com on Tue Mar 6 07:20:15 2018

Latest reply by parisa.taheri70@gmail.com on Tue Mar 6 07:20:15 2018
how to measure corner frquency in verilogA

By yvk on Sat Feb 10 06:11:27 2018

Latest reply by yvk on Sat Feb 10 06:11:27 2018
question on acmatch sim in spectre

By yvk on Sat Feb 10 06:08:53 2018

Latest reply by yvk on Sat Feb 10 06:08:53 2018
Multi threaded simulations using ncsim

By zhy910827@gmail.com on Tue Feb 6 07:19:58 2018

Latest reply by zhy910827@gmail.com on Tue Feb 6 07:19:58 2018
current through inherited connections

By davas1@gmail.com on Tue Jan 23 09:07:05 2018

Latest reply by davas1@gmail.com on Tue Jan 23 09:07:05 2018
LVS problems with Assura

By n.davari73@gmail.com on Mon Jan 8 08:51:19 2018

Latest reply by n.davari73@gmail.com on Mon Jan 8 08:51:19 2018
key shortcuts not available in virtuoso layout editor

By yaznaprabhu746@gmail.com on Tue Nov 28 03:45:41 2017

Latest reply by yaznaprabhu746@gmail.com on Tue Nov 28 03:45:41 2017
Varactor Simulation

By Umber Abbas Bajwa on Sun Nov 19 22:01:02 2017

Latest reply by Umber Abbas Bajwa on Sun Nov 19 22:01:02 2017
Analog Lib tline

By Umber Abbas Bajwa on Thu Nov 16 00:04:49 2017

Latest reply by Yagya Dutt Mishra on Fri Nov 17 07:59:15 2017
help: is there any easy way to conver GDS2 to text ?

By kenschumack@gmail.com on Thu Nov 9 09:12:05 2017

Latest reply by kenschumack@gmail.com on Thu Nov 9 09:12:05 2017
how to move contact in the middle of metal using skill code

By yallappagodachi@gmail.com on Mon Oct 30 00:19:47 2017

Latest reply by yallappagodachi@gmail.com on Mon Oct 30 00:19:47 2017
Group layout objects

By rubelsarkar161@gmail.com on Tue Oct 24 10:39:14 2017

Latest reply by rubelsarkar161@gmail.com on Tue Oct 24 10:39:14 2017
how to increase blow up limits of a quantity in Cadence VHDL-AMS si

By g3wony@gmail.com on Mon Oct 16 08:30:54 2017

Latest reply by g3wony@gmail.com on Mon Oct 16 08:30:54 2017
Skill - basic book

By sivakrishnakrovi@gmail.com on Tue Sep 26 11:29:14 2017

Latest reply by sivakrishnakrovi@gmail.com on Tue Sep 26 11:29:14 2017
auCdl netlisting from the command line

By saurabhmundr@gmail.com on Fri Sep 15 09:55:35 2017

Latest reply by saurabhmundr@gmail.com on Fri Sep 15 09:55:35 2017
Chamfered corners of two different objects/same layer

By alexander.le@navitassemi.com on Wed Aug 16 11:05:43 2017

Latest reply by alexander.le@navitassemi.com on Wed Aug 16 11:05:43 2017
I'm begging for help. VerilogA (cadence) 6lines

By ountalaga on Sun Aug 6 15:01:28 2017

Latest reply by ountalaga on Sun Aug 6 15:01:28 2017
modulo operation in calculator?

By asamarah@gmail.com on Thu Aug 3 09:31:56 2017

Latest reply by asamarah@gmail.com on Thu Aug 3 09:31:56 2017
Skill Property Lists

By jyneeng@gmail.com on Sat Jul 22 03:13:04 2017

Latest reply by jyneeng@gmail.com on Sat Jul 22 03:13:04 2017
[simvision] print waveforms to file

By alb on Fri Jul 14 20:43:02 2017

Latest reply by alb on Fri Jul 14 20:43:02 2017
how to run VHDL file

By girishkg.kg@gmail.com on Mon Jun 19 05:11:36 2017

Latest reply by girishkg.kg@gmail.com on Mon Jun 19 05:11:36 2017
Suppose I have a string "dbid:123454", how can I get object (shape or p

By Kiran on Thu Apr 20 08:47:29 2017

Latest reply by Suresh Jeevanandam on Fri Jun 9 23:45:58 2017
LVS with NMOS multiplied

By edilizarra@gmail.com on Sun Jun 4 04:26:34 2017

Latest reply by edilizarra@gmail.com on Sun Jun 4 04:26:34 2017
Where do I get LEF/DEF ?

By sunyi04191024@gmail.com on Thu Jun 1 20:24:50 2017

Latest reply by sunyi04191024@gmail.com on Thu Jun 1 20:24:50 2017
NCSIM - Simulation Error

By charlesc@precise-itc.com on Fri May 5 12:52:38 2017

Latest reply by charlesc@precise-itc.com on Fri May 5 12:52:38 2017
Check area density with Diva

By vtcad on Mon May 1 11:01:19 2017

Latest reply by vtcad on Mon May 1 11:01:19 2017
SKILL code to accept(OK) and close a dialog box

By nagaveni.aksf5a@detedu.org on Sat Apr 22 02:40:43 2017

Latest reply by nagaveni.aksf5a@detedu.org on Sat Apr 22 02:40:43 2017
X WINDOW DISPLAY INITIALIZATION FAILURE

By lxyzle161@gmail.com on Wed Apr 19 16:41:20 2017

Latest reply by lxyzle161@gmail.com on Wed Apr 19 16:41:20 2017
Sense Amplifie Simulation

By pawar.avinash0007@gmail.com on Tue Apr 18 19:27:00 2017

Latest reply by pawar.avinash0007@gmail.com on Tue Apr 18 19:27:00 2017
EDA tools for netlist's schematic

By Kevin Guo on Thu Apr 13 01:09:29 2017

Latest reply by Kevin Guo on Thu Apr 13 01:09:29 2017
Assura LVS / generate labels from pin names

By Doaa Mahmoud on Wed Apr 12 12:04:13 2017

Latest reply by Doaa Mahmoud on Wed Apr 12 12:04:13 2017
Running simulations on remote machines...

By aarya222richa@gmail.com on Fri Mar 24 09:44:11 2017

Latest reply by aarya222richa@gmail.com on Fri Mar 24 09:44:11 2017
Matlab/Simulink Cadence Cosimulation Problem

By kon.vasilakopoulos@gmail.com on Tue Mar 14 15:37:32 2017

Latest reply by kon.vasilakopoulos@gmail.com on Tue Mar 14 15:37:32 2017
Dynamically adding items to pulldown menu

By Stephen Marshall on Thu Mar 9 09:18:40 2017

Latest reply by Stephen Marshall on Thu Mar 9 09:18:40 2017
Skill to add a schematic pin?

By arjuneshm@gmail.com on Mon Mar 6 03:13:17 2017

Latest reply by arjuneshm@gmail.com on Mon Mar 6 03:13:17 2017
Alternative way to read psf output from Spectre simulation other than o

By mohammad torabi on Fri Mar 3 11:13:02 2017

Latest reply by mohammad torabi on Fri Mar 3 11:13:02 2017
finding ref libs

By ejm20Rick on Mon Feb 27 09:42:10 2017

Latest reply by ejm20Rick on Mon Feb 27 09:42:10 2017
Load a directory of SKILL files

By =?utf-8?B?U2ltw6Nv?= Afonso on Fri Feb 17 11:53:35 2017

Latest reply by =?utf-8?B?U2ltw6Nv?= Afonso on Wed Feb 22 16:20:56 2017
Creating schematic net labels with SKILL

By Brendan Simpson on Fri Feb 17 07:57:23 2017

Latest reply by Brendan Simpson on Fri Feb 17 07:57:23 2017
Object Oriented Programming in Skill++

By Suresh Jeevanandam on Thu Feb 16 03:38:25 2017

Latest reply by Suresh Jeevanandam on Thu Feb 16 03:38:25 2017
A better data structure for lists in Skill

By jm.suresh@gmail.com on Thu Feb 2 21:30:58 2017

Latest reply by jm.suresh@gmail.com on Thu Feb 16 03:31:11 2017
Tree Table: how to create and reference tree items dynamically

By flashman.hao@gmail.com on Tue Feb 14 02:55:58 2017

Latest reply by flashman.hao@gmail.com on Tue Feb 14 03:32:21 2017
Problem viewing the layout contents of the instances

By sarfarazsays@gmail.com on Thu Feb 2 00:06:06 2017

Latest reply by sarfarazsays@gmail.com on Thu Feb 2 00:06:06 2017
ipcBeginProcess MATLAB

By krishraohere@gmail.com on Wed Jan 4 22:33:59 2017

Latest reply by krishraohere@gmail.com on Wed Jan 4 22:45:43 2017
Virtuoso XL not enabled

By Gulrej Ahmed on Tue Jan 3 01:33:06 2017

Latest reply by Gulrej Ahmed on Tue Jan 3 02:20:55 2017
Cadence Virtuoso automatic routing wire width consideration

By mohammad torabi on Wed Jul 13 06:29:18 2016

Latest reply by chaithanya.yash@gmail.com on Mon Jan 2 01:22:30 2017
SKILL - Which config was used to open the present schematic?

By Christian Lindholm on Tue Dec 27 06:06:45 2016

Latest reply by Christian Lindholm on Tue Dec 27 06:06:45 2016
If statement usage in cadence spectre

By SANTHOSHNAIK H on Tue Dec 20 04:28:10 2016

Latest reply by Christian Lindholm on Tue Dec 27 03:44:50 2016
string to symbol and left side of assignment

By harsha040408@gmail.com on Thu Dec 15 01:23:09 2016

Latest reply by harsha040408@gmail.com on Thu Dec 15 01:21:37 2016
how to save OCEAN script with expression

By ktarun2910347@gmail.com on Mon Nov 14 08:54:01 2016

Latest reply by ktarun2910347@gmail.com on Mon Nov 14 08:54:01 2016
ADE simulators, spectre, hspiceD,ultasim.. which one should I pick?

By Bio_man on Thu Nov 10 14:37:42 2016

Latest reply by Bio_man on Thu Nov 10 14:37:42 2016
file viewer

By joeyao02015678@gmail.com on Tue Nov 8 05:57:07 2016

Latest reply by joeyao02015678@gmail.com on Tue Nov 8 05:57:07 2016
How LSF handles Spectre MT

By ejm20Rick on Mon Oct 24 07:45:52 2016

Latest reply by ejm20Rick on Mon Oct 24 07:45:52 2016
Rcommendation on building a workstation

By Michael Klachko on Fri Sep 23 10:16:11 2016

Latest reply by Michael Klachko on Fri Sep 23 10:16:11 2016
How to open Synopsys Hspice simulator in GUI mode in Centos 7? its work

By RAJESH YADAV on Sun Sep 18 09:25:32 2016

Latest reply by RAJESH YADAV on Sun Sep 18 09:25:32 2016
how to create wire,pin in schematic pcell

By Xi He on Thu Sep 15 18:52:22 2016

Latest reply by Xi He on Thu Sep 15 18:52:22 2016
LEF / DEF viewer

By sandradiaz016@gmail.com on Wed Sep 14 23:59:22 2016

Latest reply by sandradiaz016@gmail.com on Wed Sep 14 23:59:22 2016
AC analysis

By sudheergedala14@gmail.com on Sun Sep 11 00:13:22 2016

Latest reply by sudheergedala14@gmail.com on Sun Sep 11 00:13:22 2016
Writing a PSF file from Ocean

By Christian Lindholm on Wed Sep 7 04:20:37 2016

Latest reply by Christian Lindholm on Wed Sep 7 04:20:37 2016
Finding the routing loops in layout

By veereshshugar@gmail.com on Mon Sep 5 11:49:31 2016

Latest reply by veereshshugar@gmail.com on Mon Sep 5 11:49:31 2016
Conditional statements in calculator

By Arun Singh on Wed Aug 31 11:15:46 2016

Latest reply by Arun Singh on Wed Aug 31 11:15:46 2016
Issue in script to modify a routing blockage in Cadence SKILL

By AbdUllah Muhammad on Thu Aug 25 08:16:15 2016

Latest reply by AbdUllah Muhammad on Thu Aug 25 08:16:15 2016
How to change the graph properties in cadence virtuoso simulation r

By g3wony@gmail.com on Sat Jul 30 23:29:03 2016

Latest reply by g3wony@gmail.com on Sat Jul 30 23:28:01 2016
Streaming in a GDS file in virtuoso

By sarik.114@gmail.com on Wed Jul 13 23:25:37 2016

Latest reply by sarik.114@gmail.com on Wed Jul 13 23:25:37 2016
Help needed for form creation.

By sandeep.181985@gmail.com on Mon Jun 20 01:02:10 2016

Latest reply by sandeep.181985@gmail.com on Mon Jun 20 01:10:08 2016
How to run Assura DRC from Command line?

By amar_d@sankalpsemi.com on Fri Jun 17 03:03:52 2016

Latest reply by amar_d@sankalpsemi.com on Fri Jun 17 03:03:52 2016
Netlist to schematic generation

By Muralidhar on Thu Jun 16 21:30:32 2016

Latest reply by Muralidhar on Thu Jun 16 21:30:32 2016
45 degree paths in Virtuoso

By pretremomo@gmail.com on Wed May 25 18:31:41 2016

Latest reply by pretremomo@gmail.com on Wed May 25 18:31:41 2016
Cannot find Direct Plot-> Main form option Cadence 6.1.3.1

By prathyush424@gmail.com on Tue May 3 23:30:44 2016

Latest reply by prathyush424@gmail.com on Tue May 3 23:30:44 2016
LNA power consumption of layout is less than schematic

By nguyen LINH on Tue Apr 12 06:07:44 2016

Latest reply by mohammad torabi on Wed Apr 6 05:33:04 2016
How to learn skill

By srinivasaraju.dhenuva@gmail.com on Wed Apr 20 04:59:56 2016

Latest reply by srinivasaraju.dhenuva@gmail.com on Wed Apr 20 04:59:56 2016
how to use setof to get the list what I want?

By Bo Bob on Sun Oct 11 18:38:31 2015

Latest reply by Kedari Hotkar on Wed Mar 30 23:24:48 2016
[help]cadence skill:how to get the whole net names of a instance

By jbarth65@gmail.com on Mon Mar 21 11:27:14 2016

Latest reply by jbarth65@gmail.com on Mon Mar 21 11:27:14 2016
Problem with Skill Pcell loading and extracting

By Petyapop on Fri Mar 4 07:18:46 2016

Latest reply by Petyapop on Fri Mar 4 07:18:46 2016
printing results for each value of dc sweep in spectre simulation

By S1234 on Fri Mar 4 07:17:26 2016

Latest reply by S1234 on Fri Mar 4 07:17:26 2016
Problem seeing the layout content of the instances

By Neo2012 on Fri Mar 4 07:15:08 2016

Latest reply by Neo2012 on Fri Mar 4 07:15:08 2016
How to Create Skill Pcell

By keerthankumarkateel@gmail.com on Wed Feb 17 22:21:49 2016

Latest reply by keerthankumarkateel@gmail.com on Wed Feb 17 22:21:49 2016
Regarding the pcell creation

By keerthankumarkateel@gmail.com on Wed Feb 17 21:30:00 2016

Latest reply by keerthankumarkateel@gmail.com on Wed Feb 17 21:30:00 2016
strobe period

By sachinbpl@gmail.com on Wed Feb 10 00:38:26 2016

Latest reply by sachinbpl@gmail.com on Wed Feb 10 00:38:26 2016
Cannot Netlist Verilog-A Model in Test Bench with Spectre/ADE/...

By Yuntao Liu on Wed Jan 27 07:15:51 2016

Latest reply by Yuntao Liu on Wed Jan 27 08:36:10 2016
LVS for circuit using verilog-A model of transistor

By Doaa Mahmoud on Thu Jan 21 04:24:56 2016

Latest reply by Doaa Mahmoud on Thu Jan 21 04:24:56 2016
ADE XL issue, simualtion does not run

By mo.rez.mahmoodi@gmail.com on Fri Jan 15 12:44:23 2016

Latest reply by mo.rez.mahmoodi@gmail.com on Fri Jan 15 12:44:23 2016
how to set history entries to save in ADEXL.

By nidhi on Thu Dec 10 03:41:25 2015

Latest reply by nidhi on Thu Dec 10 03:41:25 2015
finding library 0.13u

By moein sarvaghad on Thu Nov 5 06:51:22 2015

Latest reply by moein sarvaghad on Thu Nov 5 06:51:22 2015
how to estimate the delay after floorplan , like i have a net 100 micro

By n.suresh60@gmail.com on Fri Oct 30 02:15:51 2015

Latest reply by n.suresh60@gmail.com on Fri Oct 30 02:15:51 2015
Running a parametric simulation over corners in OCEAN

By vipper.com@gmail.com on Thu Oct 15 23:12:05 2015

Latest reply by vipper.com@gmail.com on Thu Oct 15 23:12:05 2015
Error with jre when loading corners tool

By yen0126@gmail.com on Tue Oct 13 20:28:43 2015

Latest reply by yen0126@gmail.com on Tue Oct 13 20:28:43 2015
marker in virtuoso visualisation and analysis XL

By mrohith26@gmail.com on Mon Oct 12 23:16:02 2015

Latest reply by mrohith26@gmail.com on Mon Oct 12 23:16:02 2015
TSMC tech RF_NMOS layout problem in LVS (conflicting connections stampi

By Sarsam on Mon Oct 5 07:33:43 2015

Latest reply by Sarsam on Mon Oct 5 07:33:43 2015
Cdf parameters: modifying the attributes?

By anand12363@gmail.com on Sun Oct 4 22:43:23 2015

Latest reply by anand12363@gmail.com on Sun Oct 4 22:43:23 2015
Executing skill code from the shell

By shashankbanki@gmail.com on Fri Sep 4 03:38:57 2015

Latest reply by shashankbanki@gmail.com on Fri Sep 4 03:38:57 2015
how to make skill program wait

By shashankbanki@gmail.com on Sun Aug 16 23:56:45 2015

Latest reply by shashankbanki@gmail.com on Sun Aug 16 23:56:45 2015