In article <79trv8$gql$1...@owl.slip.net>,
Myron Tuttle <mtu...@slip.net> wrote:
That is correct. During the 9th bit the master sets SDA highYes thank you. Useful things, newsgroups. :)
for a NAK. At this point the slave lets go of control of SDA.
Then the masster pulls SDA low, lets SCL go back high, waits
5us and then lets SDA go high to generate the STOP. Remember
that the I2C bus can only assert a low. The highs are
generated by letting the pullup do it.
--
Tony Williams.
On Thursday, February 11, 1999 at 3:00:00 AM UTC-5, Tony Williams wrote:
In article <79trv8$gql$1...@owl.slip.net>,It is not exactly obvious why the i2c spec requires the NAK on the last byte of a read sequence.
Myron Tuttle <mtu...@slip.net> wrote:
That is correct. During the 9th bit the master sets SDA highYes thank you. Useful things, newsgroups. :)
for a NAK. At this point the slave lets go of control of SDA.
Then the masster pulls SDA low, lets SCL go back high, waits
5us and then lets SDA go high to generate the STOP. Remember
that the I2C bus can only assert a low. The highs are
generated by letting the pullup do it.
--
Tony Williams.
There are two reasons, one directly related to bus state:
1) After a read ACK, a device will prepare to shift out the next byte. If the first bit of this byte is a
zero, the device could drive the bus while the host is attempting to signal a stop condition. This
would only happen if the device drove the next bit shortly after the clock's rising edge (the edge
that latches the ACK/NAK) instead of waiting for the the next falling edge. Strictly speaking, this
is not a violation of the protocol since the device knows when it has received the ACK/NAK, and
driving opposite the host ACK/NAK for part of a clock phase is not an electrical collision given
the open-collector implementation of the drivers. So, the host must NAK to indicate to the device
'I do not want to hear from you anymore,' clearing the way for a STOP condition.
2) If a device implements auto-increment of register address (or sub-address) on read, ACK on
last read can cause the device to falsely advance its internal register address - all depending on
the device's specific implementation. Usually not a big deal since the next read transaction can
reassert the register address.
On Thursday, February 11, 1999 at 3:00:00 AM UTC-5, Tony Williams wrote:
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