[continued from previous message]
54KiB 55296/$D800+---------------+---------------+--------------+------------+
| Hardware registers |Self Test ROM^+-64B/device-+ 52KiB 53248/$D000+---------------+---------------+--------------+
|400/800:unused | | ^2KiB physically present, 50KiB 51200/$C800| XL/XE:4KiB | 4KiB RAM | but not accessed here
| OS ROM | | ~full 2KiB ROM per device 48KiB 49152/$C000+---------------+---------------+
53248-55295/$D000-$D7FF (2KiB) detail:
This address space is used by hardware registers, or by XL/XE parallel
device handlers and drivers, as follows:
$D7C0-D7FF: Parallel device #7 RAM (64 bytes)
$D780-D7BF: Parallel device #6 RAM (64 bytes)
$D740-D77F: Parallel device #5 RAM (64 bytes)
$D700-D73F: Parallel device #4 RAM (64 bytes)
$D6C0-D6FF: Parallel device #3 RAM (64 bytes)
$D680-D6BF: Parallel device #2 RAM (64 bytes)
$D640-D67F: Parallel device #1 RAM (64 bytes)
$D620-D63F: Parallel device #x RAM (32 bytes) meant for a modem device
(One parallel device may utilize 96 bytes total.)
$D600-D61F: Parallel device #0 RAM (32 bytes)
$D6xx: 800 rear RAM slot device
$D5xx: Cartridge device or 800 rear RAM slot device
$D4xx: ANTIC
$D3xx: PIA
$D2xx: POKEY
$D1xx: PBI/ECI Parallel Device (hardware registers)
$D0xx: CTIA/GTIA/FGTIA
BANKED MEMORY MANAGEMENT
========================
- In XL/XE computers (including XEgs with keyboard attached) except the
1200XL, the BASIC ROM is normally enabled at 40960-49151/$A000-$BFFF and RAM
there is disabled.
- In the XE System Console, with no keyboard attached, the Missile Command ROM
is normally enabled at 40960-49151/$A000-$BFFF and the BASIC and RAM there
are disabled.
- A Right Cartridge ROM, if present (800 only), disables any RAM at 32768-
40959/$8000-$9FFF.
- An 8KiB Left Cartridge ROM, if present, disables any RAM or other ROM at
40960-49151/$A000-$BFFF.
- A 16KiB Left Cartridge ROM, if present, disables any RAM or other ROM at
32768-49151/$8000-$BFFF.
In XL/XE computers, memory location 54017/$D301, known as PIA Port B or PORTB, is used for banked memory management as follows:
Bit Memory Control
--- --------------
#0 OS ROM / RAM area (16KiB at 49152-65535/$C000-$FFFF)
1 = OS ROM enabled / RAM disabled
0 = RAM enabled / OS ROM disabled
#1 BASIC / RAM area (8KiB at 40960-49151/$A000-$BFFF)
1 = RAM enabled / BASIC disabled
0 = BASIC enabled / RAM disabled
#2 130XE bank selection least significant bit (LSB)
Bits 2 and 3 together select 130XE extended RAM bank 0, 1, 2, or 3.
#3 130XE bank selection most significant bit (MSB)
Bits 2 and 3 together select 130XE extended RAM bank 0, 1, 2, or 3.
#4 130XE CPU Bank /Enable (CBE) at 16384-32767/$4000-$7FFF (16KiB)
1 = 6502 accesses main RAM
0 = 6502 accesses extended RAM bank selected with bits 2 and 3
#5 130XE Video Bank /Enable (VBE) at 16384-32767/$4000-$7FFF (16KiB)
1 = ANTIC accesses main RAM
0 = ANTIC accesses extended RAM bank selected with bits 2 and 3
#6 XE System Console Missile Command (8KiB at 40960-49151/$A000-$BFFF)
1 = Missile Command disabled and defer to Bit 1 for BASIC/RAM control
0 = Missile Command enabled, if Bit 1 is set to 1. If bit 1 is
also set to 0 then BASIC is enabled rather than Missile Command.
#7 Self Test routine / RAM area (2KiB at 20480-22527/$5000-$57FF)
1 = RAM enabled / Self Test disabled
0 = Self Test enabled / RAM disabled
- When the Self Test feature is invoked, the 2KiB physical ROM at
53248-55295/$D000-$D7FF is accessed at 20480-22527/$5000-$57FF.
In XL/XE computers except the 1200XL, memory location 53759/$D1FF, known as
the parallel device select hardware register or PDVS, is also used for banked memory management. Setting one of the bits (0-7) of PDVS to 1 de-selects the Floating Point Package (FPP) ROM at 55296-57343/$D800-$DFFF (2KiB) and selects the device (0-7) ROM in its place. Clearing all bits of PDVS re-enables the FPP ROM. (Note that, due to this memory banking, the FPP is not available to PBI/ECI parallel devices.)
------------------------------
Subject: 1.15) What are the pinouts for the various connectors on the Atari?
Controller port 1 (all machines):
1 5
o o o o o DE-9 Plug - male
o o o o
6 9
1. PIA Port A Input/Output Bit 0
- Joystick #1 Forward/Up
- Driving Controller #1 Bit 0 (of 2-bit Gray code)
- Trackball #1 X Direction (high=right low=left)
- Touch Tablet #1 Stylus Button
- Light Pen Button / Light Gun Trigger
- XEP80 Data to 80 Column (serial output from computer)
2. PIA Port A Input/Output Bit 1
- Joystick #1 Back/Down
- Driving Controller #1 Bit 1 (of 2-bit Gray code)
- Trackball #1 X Motion (square wave)
- XEP80 Data From 80 Column (serial input to computer)
3. PIA Port A Input/Output Bit 2
- Joystick #1 Left
- Trackball #1 Y Direction (high=down low=up)
- Touch Tablet #1 Left Button
- Paddle #1 Trigger
4. PIA Port A Input/Output Bit 3
- Joystick #1 Right
- Trackball #1 Y Motion (square wave)
- Touch Tablet #1 Right Button
- Paddle #2 Trigger
5. Potentiometer Port 1 (POKEY) (analog input, 0V-5V)
- Paddle #2 Position
- Touch Tablet #1 Vertical Position
6. Trigger 0
- Joystick/Driving/Trackball #1 Trigger (CTIA/GTIA/FGTIA)
- 800/XL/XE (not 400): Light Pen/Light Gun Detect (ANTIC)
7. +5V (50mA current rating)
8. Ground
9. Potentiometer Port 0 (POKEY) (analog input, 0V-5V)
- Paddle #1 Position
- Touch Tablet #1 Horizontal Position
Controller port 2 (all machines):
1 5
o o o o o DE-9 Plug - male
o o o o
6 9
1. PIA Port A Input/Output Bit 4
- Joystick #2 Forward/Up
- Driving Controller #2 Bit 0 (of 2-bit Gray code)
- Trackball #2 X Direction (high=right low=left)
- Touch Tablet #2 Stylus Button
- Light Pen Button / Light Gun Trigger
- XEP80 Data to 80 Column (serial output from computer)
2. PIA Port A Input/Output Bit 5
- Joystick #2 Back/Down
- Driving Controller #2 Bit 1 (of 2-bit Gray code)
- Trackball #2 X Motion (square wave)
- XEP80 Data From 80 Column (serial input to computer)
3. PIA Port A Input/Output Bit 6
- Joystick #2 Left
- Trackball #2 Y Direction (high=down low=up)
- Touch Tablet #2 Left Button
- Paddle #3 Trigger
4. PIA Port A Input/Output Bit 7
- Joystick #2 Right
- Trackball #2 Y Motion (square wave)
- Touch Tablet #2 Right Button
- Paddle #4 Trigger
5. Potentiometer Port 3 (POKEY) (analog input, 0V-5V)
- Paddle #4 Position
- Touch Tablet #2 Vertical Position
6. Trigger 1
- Joystick/Driving/Trackball #2 Trigger (CTIA/GTIA/FGTIA)
- 800/XL/XE (not 400): Light Pen/Light Gun Detect (ANTIC)
7. +5V (50mA current rating)
8. Ground
9. Potentiometer Port 2 (POKEY) (analog input, 0V-5V)
- Paddle #3 Position
- Touch Tablet #2 Horizontal Position
Controller port 3 (400/800 only):
1 5
o o o o o DE-9 Plug - male
o o o o
6 9
1. PIA Port B Input/Output Bit 0
- Joystick #3 Forward/Up
- Driving Controller #3 Bit 0 (of 2-bit Gray code)
- Trackball #3 X Direction (high=right low=left)
- Touch Tablet #3 Stylus Button
- Light Pen Button / Light Gun Trigger
2. PIA Port B Input/Output Bit 1
- Joystick #3 Back/Down
- Driving Controller #3 Bit 1 (of 2-bit Gray code)
- Trackball #3 X Motion (square wave)
3. PIA Port B Input/Output Bit 2
- Joystick #3 Left
- Trackball #3 Y Direction (high=down low=up)
- Touch Tablet #3 Left Button
- Paddle #5 Trigger
4. PIA Port B Input/Output Bit 3
- Joystick #3 Right
- Trackball #3 Y Motion (square wave)
- Touch Tablet #3 Right Button
- Paddle #6 Trigger
5. Potentiometer Port 5 (POKEY) (analog input, 0V-5V)
- Paddle #6 Position
- Touch Tablet #3 Vertical Position
6. Trigger 2
- Joystick/Driving/Trackball #3 Trigger (CTIA/GTIA)
- 800 only (not 400): Light Pen/Light Gun Detect (ANTIC)
7. +5V (50mA current rating)
8. Ground
9. Potentiometer Port 4 (POKEY) (analog input, 0V-5V)
- Paddle #5 Position
- Touch Tablet #3 Horizontal Position
Controller port 4 (400/800 only):
1 5
o o o o o DE-9 Plug - male
o o o o
6 9
1. PIA Port B Input/Output Bit 4
- Joystick #4 Forward/Up
- Driving Controller #4 Bit 0 (of 2-bit Gray code)
- Trackball #4 X Direction (high=right low=left)
- Touch Tablet #4 Stylus Button
- Light Pen Button / Light Gun Trigger
2. PIA Port B Input/Output Bit 5
- Joystick #4 Back/Down
- Driving Controller #4 Bit 1 (of 2-bit Gray code)
- Trackball #4 X Motion (square wave)
3. PIA Port B Input/Output Bit 6
- Joystick #4 Left
- Trackball #4 Y Direction (high=down low=up)
- Touch Tablet #4 Left Button
- Paddle #7 Trigger
4. PIA Port B Input/Output Bit 7
- Joystick #4 Right
- Trackball #4 Y Motion (square wave)
- Touch Tablet #4 Right Button
- Paddle #8 Trigger
5. Potentiometer Port 7 (POKEY) (analog input, 0V-5V)
- Paddle #8 Position
- Touch Tablet #4 Vertical Position
6. Trigger 3
- Joystick/Driving/Trackball #4 Trigger (CTIA/GTIA)
- Light Pen/Light Gun Detect (ANTIC)
7. +5V (50mA current rating)
8. Ground
9. Potentiometer Port 6 (POKEY) (analog input, 0V-5V)
- Paddle #7 Position
- Touch Tablet #4 Horizontal Position
Serial I/O (SIO) / Peripheral port (all machines, also peripherals):
2 12
o o o o o o Atari proprietary plug - male
o o o o o o o
1 13
1. Computer Clock Input (POKEY) 8. Motor Control (PIA)
2. Computer Clock Output (POKEY) 9. /Proceed (PIA)
3. Computer Data Input (POKEY) 10. +5V/Ready,
50mA current rating except 1mA on 1200XL 4. Ground 11. Audio Input (175mV)
5. Computer Data Output (POKEY) 12. 400/800: +12V, 300mA current rating
(normally digital, but can also XL/XE: Not Connected
be two-tone audio for cassette data)
6. Ground 13. /Interrupt (PIA)
7. /Command (PIA)
Monitor port (all but 400, NTSC 600XL, SECAM 800XL/130XE/XEgs):
3 o o 1
o o DIN-5 180 Socket - female
5 o 4
2
1. PAL 600XL: Not Connected
All others: Composite Luminance ("Y")
2. Ground
3. Audio Output
4. Composite Video (NTSC or PAL standard)
5. 1200XL/NTSC 800XL/earlier PAL 800XL: Not Connected
PAL 600XL: Ground
All others: Composite Chrominance ("C"; NTSC or PAL standard)
Monitor port, Peritel (PAL 800 Peritel only):
- Thanks Laurent Delsarte for cable verification
7 6
o 8 o
3 o o o 1 DIN-8 270 Socket - female
o o
5 o 4
2
1. RGB Sync
2. Ground (for Peritel Video Ground)
3. [unknown, verification needed!!]
4. RGB Red
5. RGB Green
6. +12V (for Peritel Slow Switching AV Mode 4:3)
7. Audio
8. RGB Blue
Monitor port (SECAM 800XL/130XE/XEgs):
5 1
o 6 o
o DIN-6 240 Socket - female
o o
4 o 2
3
1. +12V (5mA max, for Peritel Slow Switching AV Mode 4:3)
2. RF Modulator Audio (amplitude about 6x regular Audio)
3. Peritel Audio
4. Composite Video (SECAM standard)
5. Video Ground
6. +5V Mod (100mA max, power for an RF Modulator)
Power jack (all but 400,800,1200XL):
7 6
o o
3 o o 1 DIN-7 270 Socket - female
o o
5 o 4
2
1. +5V 5. Ground
2. Shield 6. +5V
3. Ground 7. Ground
4. +5V
Cartridge slot (present on all machines; Left Cartridge/Cartridge A on 800):
A B C D E F H J K L M N P R S Edge Connector
- - - - - - - - - - - - - - - 15/30 (15x2P 30P)
- - - - - - - - - - - - - - - 0.100" contact pitch
1 15
1. /S4 Select $8000-$9FFF A. RD4 RAM Deselect $8000-$9FFF
except 400: Not Connected
2. A3 Address bus line 3 B. Vss GND Ground
3. A2 Address bus line 2 C. A4 Address bus line 4
4. A1 Address bus line 1 D. A5 Address bus line 5
5. A0 Address bus line 0 E. A6 Address bus line 6
6. D4 Data bus line 4 F. A7 Address bus line 7
7. D5 Data bus line 5 H. A8 Address bus line 8
8. D2 Data bus line 2 J. A9 Address bus line 9
9. D1 Data bus line 1 K. A12 Address bus line 12
10. D0 Data bus line 0 L. D3 Data bus line 3
11. D6 Data bus line 6 M. D7 Data bus line 7
12. /S5 Select $A000-$BFFF N. A11 Address bus line 11
13. Vcc +5V P. A10 Address bus line 10
14. RD5 RAM Deselect $A000-$BFFF R. 400/800/1200XL: R/W Early
except 400: Not Connected 600XL/800XL/XE: R/W Read/Write
15. /CCTL Cartridge Control $D5xx S. 400/800: RASTIME
Row Address Strobe Time
XL/XE: BPhi2 Buffered Phase 2 Clock
Right Cartridge/Cartridge B slot (800 only):
A B C D E F H J K L M N P R S Edge Connector
- - - - - - - - - - - - - - - 15/30 (15x2P 30P)
- - - - - - - - - - - - - - - 0.100" contact pitch
1 15
1. R/W Late 1 - Read/Write Late 1 A. Phi2 Phase 2 clock
2. A3 Address bus line 3 B. Vss GND Ground
3. A2 Address bus line 2 C. A4 Address bus line 4
4. A1 Address bus line 1 D. A5 Address bus line 5
5. A0 Address bus line 0 E. A6 Address bus line 6
6. D4 Data bus line 4 F. A7 Address bus line 7
7. D5 Data bus line 5 H. A8 Address bus line 8
8. D2 Data bus line 2 J. A9 Address bus line 9
9. D1 Data bus line 1 K. A12 Address bus line 12
10. D0 Data bus line 0 L. D3 Data bus line 3
11. D6 Data bus line 6 M. D7 Data bus line 7
12. /S4 Select $8000-$9FFF N. A11 Address bus line 11
13. Vcc +5V P. A10 Address bus line 10
14. RD4 RAM Deselect $8000-$9FFF R. R/W Early
15. /CCTL Cartridge Control $D5xx S. RASTIME Row Address Strobe Time
ROM Module/Personality Module slot (800 only):
A B C D E F H J K L M N P R S T U V W X Y Z Edge
- - - - - - - - - - - - - - - - - - - - - - Connector
- - - - - - - - - - - - - - - - - - - - - - 22/44
1 22
1. D0 Data bus line 0 A. D1 Data bus line 1
2. D2 Data bus line 2 B. D4 Data bus line 4
3. D3 Data bus line 3 C. D5 Data bus line 5
4. D7 Data bus line 7 D. D6 Data bus line 6
5. A0 Address bus line 0 E. A2 Address bus line 2
6. A7 Address bus line 7 F. A9 Address bus line 9
7. A1 Address bus line 1 H. /S7 Select $E000-$FFFF (OS)
8. A8 Address bus line 8 J. A6 Address bus line 6
9. A5 Address bus line 5 K. A4 Address bus line 4
10. A3 Address bus line 3 L. A11 Address bus line 11
11. A10 Address bus line 10 M. /S6 Select $C000-$DFFF
(hardware I/O decodes; FPP)
12. A12 Address bus line 12 N. /S5 Select $A000-$BFFF (Cart)
13. CTIA/GTIA /CS Chip Select $D0xx P. /S4 Select $8000-$9FFF (Cart)
14. /EXSEL External Select R. A15 Address bus line 15
15. /GBA [data bus select] S. Phi2 Phase 2 clock
16. /WRITIME T. GBA [data bus select]
17. Phi1 Clock U. R/W Early
18. PIA /CS Chip Select $D3xx V. RASTIME Row Address Strobe Time
19. POKEY /CS Chip Select $D2xx W. D6XX /CS Chip Select $D6xx
20. NC Not Connected X. D5XX /CS Chip Select $D5xx
21. Vcc +5V Y. Vcc +5V
22. Vss GND Ground Z. Vss GND Ground
RAM Module Slot 1 (front RAM slot; 800 only):
A B C D E F H J K L M N P R S T U V W X Y Z Edge
- - - - - - - - - - - - - - - - - - - - - - Connector
- - - - - - - - - - - - - - - - - - - - - - 22/44
1 22
1. D0 Data bus line 0 A. D1 Data bus line 1
2. D2 Data bus line 2 B. D4 Data bus line 4
3. D3 Data bus line 3 C. D5 Data bus line 5
4. D7 Data bus line 7 D. D6 Data bus line 6
5. A0 Address bus line 0 E. A2 Address bus line 2
6. A7 Address bus line 7 F. A9 Address bus line 9
7. A1 Address bus line 1 H. A13 Address bus line 13
8. A8 Address bus line 8 J. A4 Address bus line 4
9. A5 Address bus line 5 K. A11 Address bus line 11
10. A3 Address bus line 3 L. A12 Address bus line 12
11. A10 Address bus line 10 M. Select line input from Slot 2 pin N 12. A6 Address bus line 6 N. Select line output to Slot 3 pin U 13. R/W Late 1 P. Select line input from Slot 2 pin R 14. Phi2 Phase 2 clock R. Select line output to Slot 3 pin 18 15. RASTIME Row Address Strobe Time S. Select line input from Slot 2 pin T 16. R/W Early T. Select line output to Slot 2 pin 18 17. /REF RAM Refresh U. /S1 Select $2000-$3FFF
18. /S0 Select $0000-$1FFF V. NC Not Connected
19. Vcc +5V W. Vcc +5V
20. Vbb -5V X. Vbb -5V
21. Vdd +12V Y. Vdd +12V
22. Vss GND Ground Z. Vss GND Ground
RAM Module Slot 2 (middle RAM slot; 800 only):
A B C D E F H J K L M N P R S T U V W X Y Z Edge
- - - - - - - - - - - - - - - - - - - - - - Connector
- - - - - - - - - - - - - - - - - - - - - - 22/44
1 22
1. D0 Data bus line 0 A. D1 Data bus line 1
2. D2 Data bus line 2 B. D4 Data bus line 4
3. D3 Data bus line 3 C. D5 Data bus line 5
4. D7 Data bus line 7 D. D6 Data bus line 6
5. A0 Address bus line 0 E. A2 Address bus line 2
6. A7 Address bus line 7 F. A9 Address bus line 9
7. A1 Address bus line 1 H. A13 Address bus line 13
8. A8 Address bus line 8 J. A4 Address bus line 4
9. A5 Address bus line 5 K. A11 Address bus line 11
10. A3 Address bus line 3 L. A12 Address bus line 12
11. A10 Address bus line 10 M. /S5 Select $A000-$BFFF
12. A6 Address bus line 6 N. Select line output to Slot 1 pin M 13. R/W Late 2,3 P. /S4 Select $8000-$9FFF
14. Phi2 Phase 2 clock R. Select line output to Slot 1 pin P 15. RASTIME Row Address Strobe Tie S. /S3 Select $6000-$7FFF
16. R/W Early T. Select line output to Slot 1 pin S 17. /REF RAM Refresh U. /S2 Select $4000-$5FFF
18. Select line input from Slot 1 pin T V. NC Not Connected
19. Vcc +5V W. Vcc +5V
20. Vbb -5V X. Vbb -5V
21. Vdd +12V Y. Vdd +12V
22. Vss GND Ground Z. Vss GND Ground
RAM Module Slot 3 (rear RAM slot; 800 only):
A B C D E F H J K L M N P R S T U V W X Y Z Edge
- - - - - - - - - - - - - - - - - - - - - - Connector
- - - - - - - - - - - - - - - - - - - - - - 22/44
1 22
1. D0 Data bus line 0 A. D1 Data bus line 1
2. D2 Data bus line 2 B. D4 Data bus line 4
3. D3 Data bus line 3 C. D5 Data bus line 5
4. D7 Data bus line 7 D. D6 Data bus line 6
5. A0 Address bus line 0 E. A2 Address bus line 2
6. A7 Address bus line 7 F. A9 Address bus line 9
7. A1 Address bus line 1 H. A13 Address bus line 13
8. A8 Address bus line 8 J. A4 Address bus line 4
9. A5 Address bus line 5 K. A11 Address bus line 11
10. A3 Address bus line 3 L. A12 Address bus line 12
11. A10 Address bus line 10 M. /EXSEL External Select
12. A6 Address bus line 6 N. Not connected
13. R/W Late 2,3 P. D6XX /CS Chip Select $D6xx
14. Phi2 Phase 2 clock R. Not connected
15. RASTIME Row Address Strobe Time S. Not connected
16. R/W Early T. Not connected
17. /REF RAM Refresh U. Select line in from Slot 1 pin N
18. Select line input from Slot 1 pin R V. D5XX /CS Chip Select $D5xx
19. Vcc +5V W. Vcc +5V
20. Vbb -5V X. Vbb -5V
21. Vdd +12V Y. Vdd +12V
22. Vss GND Ground Z. Vss GND Ground
Parallel Bus Interface (PBI) (600XL and 800XL only):
1 49
- - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - -
2 50
Edge Connector 25/50
1. GND Ground 2. /EXTSEL External Select (Input)
3. A0 Address Line 0 (Output) 4. A1 Address Line 1 (Output)
5. A2 Address Line 2 (Output) 6. A3 Address Line 3 (Output)
7. A4 Address Line 4 (Output) 8. A5 Address Line 5 (Output)
9. A6 Address Line 6 (Output) 10. GND Ground
11. A7 Address Line 7 (Output) 12. A8 Address Line 8 (Output)
13. A9 Address Line 9 (Output) 14. A10 Address Line 10 (Output)
15. A11 Address Line 11 (Output) 16. A12 Address Line 12 (Output)
17. A13 Address Line 13 (Output) 18. A14 Address Line 14 (Output)
19. GND Ground 20. A15 Address Line 15 (Output)
21. D0 Data Line 0 (In/Out) 22. D1 Data Line 1 (In/Out)
23. D2 Data Line 2 (In/Out) 24. D3 Data Line 3 (In/Out)
25. D4 Data Line 4 (In/Out) 26. D5 Data Line 5 (In/Out)
27. D6 Data Line 6 (In/Out) 28. D7 Data Line 7 (In/Out)
29. GND Ground 30. GND Ground
31. BPhi2 Buffered Phase 2 Clock(Out)32. GND Ground
33. Reserved 34. /RST Reset (Output)
35. /IRQ Interrupt Request (Input) 36. RDY Ready (Input)
37. Reserved 38. EXTENB External Decoder Enable (Out)
39. Reserved 40. /REF Refresh (Output)
41. /CAS Column Address Strobe (Out) 42. GND Ground
43. /MPD Math Pack Disable (Input) 44. /RAS Row Address Strobe (Output)
45. GND Ground 46. LR/W Latched Read/Write (Output)
47. 600XL: +5V 48. 600XL: +5V
800XL: Reserved 800XL: Reserved
49. AUDIO Audio In (Input) 50. GND Ground
Enhanced Cartridge Interface (ECI)/Expansion port (130XE, 800XE, & many 65XE)
A B C D E F H Edge
- - - - - - - Connector
- - - - - - - 7/14
1 7
A. Reserved 1. /EXTSEL External Select (Input)
B. /IRQ Interrupt Request (Input) 2. /RST Reset (Output)
C. /HALT (Input) 3. D1XX /CS Chip Select $D1xx (In)
D. A13 Address Line 13 (Output) 4. /MPD Math Pack Disable (Input)
E. A14 Address Line 14 (Output) 5. AUDIO Audio In (Input)
F. A15 Address Line 15 (Output) 6. /REF Refresh (Output)
H. GND Ground 7. +5V
Keyboard port (XE System Console only):
8 1
o o o o o o o o DA-15 Plug - male
o o o o o o o - pin numbering reverse of standard
15 9
1. /K2 Keyboard Scan (POKEY) 9. +5V
2. /K1 Keyboard Scan (POKEY) 10. +5V
3. /K0 Keyboard Scan (POKEY) 11. KBDETECT (GTIA/FGTIA)
4. /KR1 Keyboard Response (POKEY) 12. NC Not Connected
5. /K5 Keyboard Scan (POKEY) 13. GND Ground
6. /K4 Keyboard Scan (POKEY) 14. NC Not Connected
7. /K3 Keyboard Scan (POKEY) 15. GND Ground
8. /KR2 Keyboard Response (POKEY)
------------------------------
Subject: 1.16) Who designed the Atari 8-bit computers?
Many people were involved in the planning, design and engineering of the 8-bit Atari computers. This section attempts to identify the key engineering personnel at Atari and their roles, with the understanding that such a list necessarily oversimplifies the true nature of complex product development.
Some sources:
https://archive.org/details/JoeDecuirEngineeringNotebook1977, https://archive.org/details/JoeDecuirEngineeringNotebook1978, http://dougneubauer.com/atari/,
Goldberg/Vendel, Atari Inc.: Business is Fun, 2012, pp. 446-461.
Atari 400/800 hardware designers:
Steven T. Mayer - Chief system inventor/architect
Jay G. Miner - Project manager, system architecture
Douglas G. Neubauer - POKEY designer (also wrote Star Raiders)
Joseph C. Decuir - System co-inventor/co-architect; ANTIC designer
George McLeod - CTIA/GTIA logic designer
R. Scott Scheiman - Digital circuit designer; serial bus protocol
Francois Michel - ANTIC logic co-designer
M. John Ellis - VP engineering
Stephen D. Bristow - VP engineering
Wade B. Tuma - Director of engineering
Niles E. Strohl - Project engineering
John Vurich - Product marketing manager
Kevin P. McKinsey - 800 industrial designer (case)
Hugh M. Lee - 800 industrial designer (case)
Jeffery O. Nelson - 400 industrial designer (case)
Douglas A. Hardy - 400 industrial designer (case)
- Other notable contributors:
- VP research and development Al Alcorn
- Director of research Bob Brown
- Programmers Al Miller, Larry Kaplan, Bob Whitehead
- Cyan Engineering unit engineers including Ron Milner
- Chipset development technicians: Jim Luby (ANTIC), Steve Smith (CTIA),
Mark Shieu (POKEY), Steve Stone (POKEY), Delwin Pearson (POKEY)
Atari 1200XL hardware designers:
Ajay Chopra - System architect, production specification author
David Owen Sovey - Project engineering, production specification
Larry Plummer - Director of Engineering, production specification
David R. Stubben - VP engineering
Gene B. Rosen - VP engineering
Steven T. Mayer - VP research & product development
Mark Lutvak - Product marketing manager
Regan L. Cheng - Industrial designer (case)
Atari 600XL/800XL hardware designers:
Gregg Squires - Project Manager, Engineering Designer
Robert (Bob) Card - Principal Engineer
Steven Ray - Critical Electronics Layout Designer
Joel Moskowitz - Mechanical Engineer
Philippe des Rioux - Project engineer
Glenn Boles - Project engineer
Ajay Chopra - Parallel Bus Interface specification
Steven T. Mayer - SVP research & product development
Andrew Soderberg - Product marketing manager
Regan L. Cheng - Industrial designer (cases)
Atari 800XL("800XLF","SECAM ROSE")/65XE/130XE hardware designers:
Phil Suen - Director of engineering
Vincent H. Wu - Project manager
David Owen Sovey - Project engineer
Richard C. Pasco - FREDDIE logic design
Bryan Kerr - Product marketing manager
Ira Velinsky - 65XE/130XE industrial designer (case)
XEgs/800XE hardware designers:
Jose A. Valdes - Development engineer
Ira Velinsky - Industrial designer (cases)
Atari Operating System designers and programmers are given elsewhere in this FAQ List.
------------------------------
Subject: 1.17) How do I use my Atari computer system?
This FAQ List is intended to answer many questions commonly asked about the 8- bit Atari computers, but one thing it doesn't do is offer a tutorial on basic usage of the system. Many such books were published, including those listed here. "Your Atari Computer" by Poole is often recognized as a classic among these.
[400/800]
Your Atari Computer: A Guide to Atari 400/800 Personal Computers
Lon Poole with Martin McNiff & Steven Cook, 1982 www.atarimania.com/documents/Your-Atari-Computer.pdf
User's Handbook to the Atari 400/800 Computers
Jeffrey R. Weber and Stephen J. Szczecinski, 1983 www.atarimania.com/documents/Users-Handbook-to-the-Atari.pdf
Get More From the Atari, Ian Sinclair, 1983 www.atarimania.com/documents/Get_More_From_The_Atari.pdf
[400/800/1200XL]
The User's Guide to Atari 400-800-1200XL Computers, Software, & Peripherals
By the editors of Consumer Guide, 1983 www.atarimania.com/documents/The-Users-Guide-to-the-Atari.pdf
How to use Atari Computers: An Introduction to the 400, 800, and 1200
Michael Boom, 1983
www.atarimania.com/documents/How-to-Use-Atari-Computers.pdf
Atari for the Beginning Beginner, Judy Chamberlain and Tom Chamberlain, 1983 www.atarimania.com/documents/Atari-for-the-Beginning-Beginner.pdf
[600XL/800XL, and also earlier models]
Your Atari Computer: A Guide to Atari 400/800 Personal Computers - XL Edition Lon Poole with Martin McNiff & Steven Cook (1983?) www.atarimania.com/documents/Your-Atari-Computer-XL-Edition.pdf
The Elementary Atari, William B. Sanders, 1983 www.atarimania.com/documents/The-Elementary-Atari.pdf
Atari XL User's Handbook, by WSI Staff, 1984 www.atarimania.com/documents/Atari_XL_User_s_Handbook.pdf
Getting Started with the Atari 600XL, Peter Goode, 1984 www.atarimania.com/documents/Getting_Started_with_The_Atari_600XL.pdf
The Atari 800XL: A Practical Guide, Thomas Blackadar, 1984 www.atarimania.com/documents/The-Atari-800XL-A-Practical-Guide.pdf
The Atari XL Handbook, Peter Lupton & Fraser Robinson, 1984 www.atarimania.com/documents/The_Atari_XL_Handbook.pdf
The Atari User's Encyclopedia, Gary Phillips and Jerry White, 1984 www.atarimania.com/documents/The-Atari-Users-Encyclopedia.pdf
InfoWorld's Essential Guide to Atari Computers, Scott Mace, 1984 www.atarimania.com/documents/InfoWorlds-Essential-Guide-to-Atari.pdf
How to Excel on Your Atari 600XL and 800XL, Timothy O. Knight, 1985 www.atarimania.com/documents/How_To_Excel_On_Your_Atari.pdf
[65XE/130XE, and also earlier models]
Atari XE User's Handbook, by Weber Systems, Inc. Staff, 1985 www.atarimania.com/documents/Atari_XE_User_s_Handbook.pdf
The Atari 130XE Handbook, Peter Lupton & Frazer Robinson, 1985 www.atarimania.com/documents/The_Atari_130XE_Handbook.pdf
------------------------------
Subject: 2.1) What are analog TV broadcasting systems and composite video?
The video display capabilities of the Atari computer are intimately related to the television (TV) broadcast systems of their time because, in part, consumer TVs were expected to be the primary display devices used with the system. The Atari was designed with the ability to output an analog radio-frequency (RF) audio/video signal that could be interfaced with a TV's antenna input, the
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