=?UTF-8?Q?_Simply_defining_G=c3=b6del_Incompleteness_and_Tarski_Und?= =
From
olcott@21:1/5 to
All on Fri Aug 14 12:24:42 2020
XPost: comp.theory, comp.ai.philosophy, sci.lang.semantics
An abstract machine that has a tape head that can be advanced in 0 to 0xffffffff increments an unlimited number of times does specify a model
of computation that has access to unlimited memory. The technical name
for memory addressing based on the displacement from the current memory
address is relative addressing.
32-bit x86 function calls already use signed 32-bit relative addressing.
void Bar(int N)
{
Foo(5);
}
void Foo(int N)
{
Bar(6);
}
101: 55 push ebp
102: 8BEC mov ebp, esp
104: 6A05 push 0x5
106: E823000000 call 0x12e ; +23h bytes little endian
10b: 83C404 add esp, 0x4 ; of 00000023h
10e: 5D pop ebp
10f: C3 ret
12e: 55 push ebp
12f: 8BEC mov ebp, esp
131: 6A06 push 0x6
133: E8C9FFFFFF call 0x101 ; -37h bytes little endian
138: 83C404 add esp, 0x4 ; of FFFFFFC9h
13b: 5D pop ebp
13c: C3 ret
The x86 architecture already specifies a Turing complete model of
computation for its control flow operations:
Signed 32-bit relative addressing for function calls. (shown above).
Signed 32-bit relative addressing for unconditional branches.
Signed relative addressing for all conditional branches.
It can also be understood (although more difficult) that the above
Turing complete model of computation applied to the control flow of the
x86 architecture can be leveraged to provide access to unlimited data.
It can do this within the current x86 instruction set.
I won't provide the details of this to avoid getting into endless debate
with people that do not understand that they do not understand. Those
capable of understanding can easily figure out for themselves how this
would work, and those that cannot figure out for themselves how this
would work may be incapable of understanding. I already provided the
full basis in my discussion of control flow.
--
Copyright 2020 Pete Olcott
--
Copyright 2020 Pete Olcott
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